Multiprocessor Diagnostic Coverage via Software Self-Test Partitioning

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Solution Overview

Problem

Existing methods for achieving high diagnostic coverage in electronic systems with functional safety, particularly in multiprocessor architectures, require hardware modifications and are limited in detecting processor failures, especially those causing subtle changes in program flow.

Innovation Solution

A method that decomposes programs into parallel subprograms and partitions self-test operations into diagnostic-self-test, system-value self-test, and applicational self-test operations, optimizing failure-probability targets without hardware modifications, using a control module for data exchange and checking, thereby enhancing diagnostic coverage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hardware modifications are made to achieve high diagnostic coverage, then diagnostic coverage is improved, but device complexity increases

Engineering Contradiction:
Improvediagnostic coverageVSAvoidhardware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces hardware-based diagnostic mechanisms with software-based self-test operations. Instead of modifying processor hardware to detect failures, the system uses software routines that periodically execute self-test code, compare results, and detect failures through software comparison logic, thereby achieving high diagnostic coverage without increasing hardware complexity

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces an intermediary comparison mechanism that receives outputs from multiple independent subprograms and compares them to detect failures. This intermediary comparison layer enables high diagnostic coverage by detecting subtle differences in program flow without requiring complex hardware modifications to the processors themselves

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If processor complexity increases to improve performance, then productivity is improved, but difficulty of detecting and measuring failures increases

Engineering Contradiction:
Improvecomputational performanceVSAvoidfailure detection difficulty
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent divides the program into multiple independent subprograms that are executed in parallel. Each subprogram processes the same input data independently, and their outputs are compared to detect failures. This segmentation approach enables effective failure detection in complex processors by breaking down the detection problem into manageable comparisons between independent execution paths

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates multiple copies of the same program logic executed as separate subprograms on different processors or cores. By copying the program and executing it independently multiple times, the system can compare outputs to detect failures, thereby maintaining the ability to detect subtle failures even as processor complexity and performance increase

Inventive Principle:
Principle #26Copying

3Reliability

If self-test operations are executed frequently to improve diagnostic coverage, then diagnostic coverage is improved, but loss of time for computation increases

Engineering Contradiction:
Improvediagnostic coverageVSAvoidcomputation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements periodic self-test operations that execute at defined intervals rather than continuously. The system balances diagnostic coverage requirements with computational performance by performing self-tests at periodic intervals, thereby achieving adequate failure detection without excessive loss of computation time

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10761916B2Method for executing programs in an electronic system for applications with functional safety comprising a plurality of processors, corresponding system and computer program product
Publication Date: 2020.09.01 INTEL CORP
  • US10761916B2 patent drawing
  • US10761916B2 patent drawing
  • US10761916B2 patent drawing

AI summary

A method for executing programs (P) in an electronic system for applications with functional safety that comprises a single-processor or multiprocessor processing system (10) and a further independent control module (15), including: carrying out a decomposition of a program (P) that includes a safety function (SF) to be executed via said system (10) into a plurality of parallel subprograms (P1, . . . , Pn); assigning execution of each parallel subprogram (P1, . . . , Pn) to a respective processing module (11) of the system, in particular a processor (C1, . . . , Cm) of said multiprocessor architecture (10) or a virtual machine (V1, . . . , Vn) associated to one of said processors (C1, . . . , Cm); carrying out in the system (10), periodically according to a cycle frequency (fcyc) of the program (P) during normal operation of said system (10), in the context of said safety function (SF), self-test operations (Astl, Asys, Achk) associated to each of said subprograms (P1, . . . , Pn) and to the corresponding processing modules (11) on which they are executed, said self-test operations (Astl, Asys, Achk) including: diagnostic-self-test operations (Astl), which carry out diagnostic self-tests; operations (Asys) of self-testing of system values measured on the architecture (10); applicational self-test operations (Achk), which include operations of checking execution of conditions of use (Acou) and/or execution of LBISTs (Logic Built-in Self-Tests) (Abst), and including: generating respective self-test data (Dstl, Dsys, Dchk) corresponding to the self-test operations (Astl, Asys, Achk) and carrying out checking operations (51, 61) on said self-test data (Dstl, Dsys, Dchk); exchanging said self-test data (Dstl, Dsys, Dchk) continuously via a protocol (PL) of messages (MC) with the further independent control module (15); carrying out at least part of said checking operations (51, 61) in said further control module (15); and executing said operation of decomposition of the program (P) into a plurality of parallel subprograms (P1, . . . , Pn) to achieve a coverage target (Astl, Asys, Achk) for each of said self-test operations (Astl, Asys, Achk) associated to a respective subprogram (P1, . . . , Pn) or processing module (11) in such a way that it respects a given failure-probability target (g12).