Multiprocessor Task Migration via Base Register
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Solution Overview
Problem
In multiprocessor systems, existing technologies face challenges in efficiently migrating tasks between processors with non-uniform memory architectures, particularly without using a Memory Management Unit (MMU), which affects energy efficiency and performance.
Innovation Solution
A multiprocessor system with a migration determining unit and a migration processing unit that determines and processes task migration types, allowing dynamic data and static data relocation based on a Base Register (BR) without converting pointers, enabling task migration between source and destination nodes in a multiprocessor environment with non-uniform memory architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If task migration is implemented in a multiprocessor system with non-uniform memory architecture without MMU, then system adaptability and energy efficiency are improved, but system complexity increases due to the need for migration determining unit and migration processing unit
Solution Approach 1:
The migration processing unit is designed to handle multiple migration types (full migration, partial migration, state migration) through a single unified structure, allowing the system to adapt to different task migration scenarios without requiring separate dedicated hardware for each migration type, thus improving adaptability while controlling complexity
2Productivity
If pointer conversion is avoided during task migration, then migration speed and energy efficiency are improved, but memory management complexity increases due to the need for base register-based address relocation
Solution Approach 1:
The patent extracts the address translation function from the traditional MMU and implements it through a simpler base register mechanism. By separating the base register management from the full MMU functionality, the system achieves fast migration without pointer conversion while maintaining manageable memory management complexity through targeted functionality extraction
3Speed
If hierarchical memory structure is used in multiprocessor system, then local memory access speed is improved, but task migration difficulty increases due to discontinuous memory locations across processors
Solution Approach 1:
The patent introduces the base register as an intermediary mechanism that mediates between the hierarchical memory structure and task migration requirements. The base register acts as a translator that converts logical addresses to physical addresses across different memory hierarchies, enabling seamless task migration while preserving the performance benefits of local memory access
Data Source
AI summary
A multiprocessor system and a migration method of the multiprocessor system are provided. The multiprocessor system may process dynamic data and static data of a task to be operated in another memory or another processor without converting pointers, in a distributed memory environment and in a multiprocessor environment having a local memory, so that dynamic task migration may be realized.