Multi-Rate Pre-Distorter Filtering for Memory-Effect Modeling
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Solution Overview
Problem
Existing pre-distortion architectures face challenges in modeling a wide range of memory effects exhibited by non-linear electronic devices, leading to complex and memory-intensive models that are costly to implement and consume large amounts of memory.
Innovation Solution
A pre-distorter memory modeling system with multiple branches, each including a down-sampler, memory structure with delay elements, and up-sampler, which down-samples, filters, and up-samples the output basis function signals to produce a distortion signal, allowing for efficient modeling of memory effects with reduced complexity and memory consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complex memory models are used to model a wide range of memory effects, then the accuracy of distortion modeling is improved, but the device complexity and memory consumption increase significantly
Solution Approach 1:
The pre-distorter is divided into multiple parallel branches, each handling a specific memory effect with dedicated down-samplers, memory structures, and up-samplers. This segmentation allows complex memory effects to be modeled through simpler, specialized sub-structures rather than one monolithic complex model.
Solution Approach 2:
The patent introduces multiple dimensions of processing by operating different branches at different sampling rates (different Mk values). This multi-rate approach adds a temporal dimension to the modeling, allowing memory effects at different time scales to be captured efficiently without requiring uniformly high complexity across all processing paths.
2Measurement precision
If complex memory models are used to model a wide range of memory effects, then the accuracy of distortion modeling is improved, but the memory consumption increases significantly
Solution Approach 1:
Memory consumption is segmented across multiple branches, each with its own memory structure sized appropriately for the specific memory effect it models. This distributes memory usage rather than requiring one large monolithic memory structure, reducing peak memory consumption while maintaining overall modeling accuracy.
Solution Approach 2:
Each branch applies memory effects partially through down-sampling and selective filtering, rather than applying full-rate memory effects across all signals. This partial action approach reduces the total number of memory operations required while still capturing the essential memory effects.
3Device complexity
If down-sampling, filtering, and up-sampling are used in each branch, then the complexity and memory consumption are reduced, but the processing steps become more numerous
Solution Approach 1:
The processing in each branch follows a periodic pattern of down-sampling, filtering, and up-sampling. This periodic structure regularizes the processing flow, making it more efficient to implement in hardware or firmware despite the multiple steps, as the repetitive nature allows for optimization and reuse of processing elements.
Data Source
AI summary
A method and apparatus for modeling distortion of a non-linear device are disclosed. A pre-distorter model has a plurality of branches. Each branch receives a different output basis function signal. At least one branch includes a down-sampler, a memory structure and an up-sampler. The down-sampler down-samples the received output basis function signal received by the branch by a factor of 1/Mk, where Mk is different for each of the at least one branches. The memory structure includes at least one delay element to delay the output of the down-sampler according to a predetermined delay. The memory structure has an output based on an output of the at least one delay element. The up-sampler up-samples the output of the memory structure by the up-sampling factor, Mk.