Multi-Root PCIe Switch Redundancy Control CPU Load
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Solution Overview
Problem
In information processing systems with redundancy configurations, the existing redundancy control methods impose a significant load on CPUs, leading to decreased system performance due to the need for TCP processing and packet copying, which can result in lost data and incomplete redundancy control during active CPU failures.
Innovation Solution
The implementation of a multi-root PCI Express switch and network interface allows simultaneous connection and data transfer between multiple CPUs, using a multi-root PCI Express switch and network interface to temporarily store service request packets in a shared memory, eliminating the need for exclusive control structures and reducing CPU load by avoiding TCP processing for redundancy synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TCP processing and packet copying are used for redundancy control, then reliability is improved, but CPU load increases and system performance deteriorates
Solution Approach 1:
The patent extracts the redundancy control function from the CPU processing path by implementing a dedicated redundancy control unit that operates independently. This unit directly accesses packet data through memory addresses without requiring CPU intervention for TCP processing or packet copying, thereby maintaining reliability while reducing CPU load and preserving system performance.
Solution Approach 2:
The patent introduces a redundancy control unit as an intermediary component between the network interface and the CPU. This unit acts as a mediator that handles redundancy control operations independently, using direct memory access to read packet data and generate redundancy packets without burdening the CPU, thus resolving the contradiction between reliability and performance.
2Reliability
If exclusive control structures are used for PCI connection, then connection reliability is improved, but device complexity and control overhead increase
Solution Approach 1:
The patent implements a multi-root PCI Express switch that provides universal access capabilities for multiple CPUs simultaneously. Instead of requiring exclusive control structures for each CPU connection, the switch allows multiple CPUs to access the network interface through a unified mechanism, reducing device complexity while maintaining connection reliability through its inherent arbitration and management capabilities.
3Reliability
If packet copying is performed for redundancy, then data reliability is improved, but processing time increases and speed decreases
Solution Approach 1:
The patent implements a memory address-based copying mechanism where the redundancy control unit directly reads packet data from memory using stored addresses and generates redundancy packets without traditional packet copying operations. This approach maintains data reliability by ensuring redundant copies are created while avoiding the speed penalty of conventional packet copying methods by operating at the memory address level.
Data Source
AI summary
An information processing system includes a plurality of processors for executing processing according to a predetermined processing request sent from a different device; a switching device for performing data transfer between the individual processors and the different device; and a storage device which is connected to the switching device and enables data transfer to and from the individual processors. At least one of the processors includes a processing request storing unit for storing processing request data sent from the different device to the processor, into the storage device by data transfer. At least another one of the processors includes a processing request reading unit for reading the processing request data stored in the storage device from the storage device by data transfer.