Multi-Scale Image Sensor Readout for Low-Latency Vision Processing

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Solution Overview

Problem

Existing computer vision processing systems, particularly in mobile devices like smart glasses, face challenges due to high computational complexity and power constraints, necessitating inefficient multiple captures and digital binning processes that increase latency and power consumption.

Innovation Solution

Implementing a scale-based sensor readout with bit-reversed addressing and memory buffers to enable parallel processing at different scales, allowing early termination and reduced power consumption by using scalable row and column read logic, along with reduced precision integral images.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple captures and digital binning processes are used, then processing completeness is improved, but latency and power consumption increase

Engineering Contradiction:
Improveprocessing completenessVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the image sensor readout process into multiple independent scale levels (e.g., 2x, 4x, 8x binning scales) that can be processed simultaneously. Each scale level processes a different subset of pixel data, allowing the system to achieve comprehensive processing coverage without requiring sequential multiple captures, thereby reducing latency while maintaining processing completeness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a scale dimension to the traditional single-resolution image processing pipeline. By adding this dimensional parameter, the system can process images at multiple binning scales in parallel from a single capture, transforming the temporal sequence of multiple captures into a spatial parallel processing architecture across different scale levels.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple captures and digital binning processes are used, then processing completeness is improved, but power consumption increases

Engineering Contradiction:
Improveprocessing completenessVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent segments the computational workload across multiple scale levels, where each level processes a different subset of data. This segmentation allows the system to distribute power consumption across parallel operations rather than concentrating it in sequential multiple captures, reducing total energy usage while maintaining processing completeness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary processing at reduced resolution scales first, extracting useful information from downsampled data before proceeding to higher resolution processing if needed. This preliminary action at lower power consumption levels allows early termination of the processing pipeline when sufficient information is obtained, avoiding the full power cost of processing all data at maximum resolution.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If parallel processing at different scales is implemented, then processing speed is improved, but device complexity increases

Engineering Contradiction:
Improveprocessing speedVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent designs a universal processing architecture where a single image sensor and processing pipeline can handle multiple scale levels and different processing tasks. The same hardware infrastructure performs both full-resolution and downsampled processing, as well as supporting various binning scales (2x, 4x, 8x), thereby achieving parallel processing capability without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements a nested processing structure where lower-scale processing results are embedded within the overall processing framework. The 2x binning results contain a subset of the 4x binning results, which in turn contain 8x results, creating a hierarchical nested structure that shares computational resources and reduces overall system complexity while enabling parallel processing at multiple levels.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS12475522B2Methods and apparatus for scalable processing
Publication Date: 2025.11.18 SOFTEYE INC
  • US12475522B2 patent drawing
  • US12475522B2 patent drawing
  • US12475522B2 patent drawing

AI summary

Methods and apparatus for scalable processing. Conventional image sensors read image data in a sequential row-by-row manner. However, image data may be more efficiently processed at different scales. For example, computer vision processing at a first scale may be used to determine whether subsequent processing with more resolution is helpful. Various embodiments of the present disclosure readout image data according to different scales; scaled readouts may be processed using scale specific computer vision algorithms to determine next steps. In addition to scaled readouts of image data, some variants may also provide commonly used data and/or implement pre-processing steps.