Multi-Stacking Carrier Structure for Wafer Thinning and Electrical Access
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Solution Overview
Problem
The scaling down of semiconductor devices poses challenges in achieving improved quality, yield, performance, and reliability while reducing complexity, particularly in the thinning process where conventional carriers obscure device performance analysis.
Innovation Solution
A multi-stacking carrier structure is introduced, comprising multiple tiers of passivation and insulating layers with vias, which serves as a temporary carrier during substrate thinning, eliminating the need for additional carriers and providing an electrical path for performance analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional carriers are used during substrate thinning, then the substrate can be supported during processing, but the carriers obscure device performance analysis and require additional removal steps
Solution Approach 1:
The patent introduces a multi-stacking carrier structure as an intermediary element that temporarily supports the substrate during thinning processes. This carrier includes multiple tiers with passivation layers, insulating layers, and vias that provide mechanical support while allowing electrical access to device elements. The carrier is designed to be removed after thinning, solving the contradiction by providing necessary support during processing while enabling subsequent device analysis without obscuring elements.
Solution Approach 2:
The carrier structure is segmented into multiple functional tiers: a first tier with passivation and insulating layers for electrical isolation and protection, a second tier with similar layers for additional isolation, and a third tier providing final protection. This segmentation allows each layer to perform its specific function while collectively providing substrate support without obscuring device performance analysis.
2Stability of the object's composition
If additional carriers are used to support the substrate during thinning, then processing stability is improved, but fabrication cost increases
Solution Approach 1:
The multi-stacking carrier structure serves multiple functions simultaneously: it provides mechanical support during substrate thinning, offers electrical isolation through passivation and insulating layers, enables electrical access to device elements via vias, and can be removed after processing. This multi-functionality eliminates the need for separate support structures, reducing overall fabrication cost while maintaining processing stability.
3Measurement precision
If the substrate is thinned to improve device performance analysis, then measurement accuracy is improved, but the substrate becomes more vulnerable during processing
Solution Approach 1:
The multi-stacking carrier structure is applied to the substrate before the thinning process begins. This preliminary action provides mechanical support and protection to the substrate throughout the thinning operations, preventing damage to the thinned substrate while enabling accurate device performance analysis after processing.
Data Source
AI summary
A multi-stacking carrier structure includes an etch stop layer; a first tier comprising a first passivation layer positioned on the etch stop layer, a first insulating layer positioned on the first passivation layer, and a first via positioned along the first passivation layer and the first insulating layer; a second tier positioned on the first tier and comprising a second passivation layer positioned on the first insulating layer, a second insulating layer positioned on the second passivation layer, and a second via positioned along the second passivation layer and the second insulating layer, and electrically connected to the first via; and a third tier positioned on the second tier and comprising a third passivation layer positioned on the second insulating layer, a third insulating layer positioned on the third passivation layer, and a third via positioned along the third passivation layer and the third insulating layer.