Multi-Stage ADC Circuit Using SAR and Single-Slope Conversion
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Solution Overview
Problem
Existing analog-to-digital converter (ADC) circuits for CMOS image sensors face challenges in balancing conversion speed and power consumption, with traditional SAR ADCs being fast but complex and single-slope ADCs being slow and power-efficient but inaccurate.
Innovation Solution
A multi-stage conversion method that uses a SAR ADC to resolve most significant bits (MSBs) in the first stage and a single-slope ADC to resolve least significant bits (LSBs) in the second stage, sharing reference levels and ramp generation across thousands of converters for enhanced parallel processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If SAR ADC is used for conversion, then conversion speed is improved, but device complexity increases
Solution Approach 1:
The ADC conversion process is segmented into two distinct stages: a first stage using a SAR ADC for coarse conversion of MSBs, and a second stage using a single-slope ADC for fine conversion of LSBs. This segmentation allows each stage to be optimized independently, achieving high conversion speed in the first stage while maintaining low complexity in the second stage.
Solution Approach 2:
The patent introduces a temporal dimension by performing conversions in two sequential stages rather than attempting single-stage conversion. The first stage resolves MSBs quickly using SAR ADC, then the second stage resolves LSBs using single-slope ADC, effectively trading time for reduced complexity in the overall system.
2Use of energy by moving object
If single-slope ADC is used for conversion, then power consumption is reduced, but conversion speed decreases
Solution Approach 1:
The conversion process is divided into two stages with different power characteristics. The first stage uses SAR ADC for quick MSB conversion, and the second stage uses power-efficient single-slope ADC for LSB conversion. This segmentation allows the system to achieve overall low power consumption while maintaining acceptable conversion speed through the multi-stage approach.
Solution Approach 2:
The patent applies partial action by having the single-slope ADC operate only on the LSB portion of the conversion after the SAR ADC has handled the MSBs. This partial application of single-slope conversion minimizes the time and power required while still achieving the desired precision.
3Productivity
If multi-stage conversion is implemented, then conversion efficiency is improved, but device complexity increases
Solution Approach 1:
The patent merges two different ADC architectures (SAR ADC and single-slope ADC) into a unified multi-stage conversion system. By combining the speed advantages of SAR ADC with the power efficiency of single-slope ADC in a coordinated multi-stage process, the system achieves high conversion efficiency while managing complexity through shared resources and standardized interfaces.
Solution Approach 2:
The conversion circuit is designed with multi-functionality to perform both SAR-based coarse conversion and single-slope-based fine conversion using a unified architecture. The circuit can operate in different modes and stages, reducing the need for completely separate dedicated circuits and thereby managing complexity while maintaining high efficiency.
Data Source
AI summary
An ADC circuit that can resolve the most significant bits (MSBs) using a first circuit during a first stage of a multi-stage conversion and resolve the least significant bits (LSBs) using a second circuit during a second stage of the multi-stage conversion. This can be used, for example, in massively parallel applications where the reference level generation can be shared between thousands of converters.