Multi-Stage Amplifier CM Node Shorting for Low-Area Termination
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Solution Overview
Problem
Multi-stage amplifiers face issues with large common-mode disturbances due to conventional CM termination techniques, leading to area and power penalties, and require an innovative solution to suppress CM gain efficiently.
Innovation Solution
A multi-stage amplifier design where the common-mode nodes of successive stages are shorted using a routing trace, allowing for small or omitted capacitive CM termination, and utilizing a negative feedback loop to suppress CM gain without the need for power-hungry operational amplifiers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a large-sized CM termination capacitor is used, then CM signal suppression is improved, but area consumption increases
Solution Approach 1:
The patent introduces a buffer amplifier as an intermediary component between the CM termination capacitor and ground. This buffer amplifier acts as a mediator that provides a low-impedance path to ground, allowing the use of a much smaller capacitor value while achieving the same CM suppression effect. The buffer amplifier's virtual ground capability replaces the need for a large capacitor, thus resolving the area penalty issue.
Solution Approach 2:
The patent changes the impedance parameter of the CM termination path by introducing a buffer amplifier. Instead of relying on a large capacitor to provide low impedance, the buffer amplifier actively maintains a virtual ground with very low impedance. This parameter change allows the capacitor size to be dramatically reduced while maintaining effective CM suppression.
2Object-affected harmful factors
If a power-hungry OP-AMP buffer with very low impedance is used, then CM signal suppression is improved, but power consumption increases
Solution Approach 1:
The patent applies partial action by using the buffer amplifier only for CM termination purposes rather than requiring it to drive large capacitive loads. The buffer amplifier operates in a partially loaded condition, providing virtual ground for CM signals while consuming less power than would be required to drive large capacitors or provide excessive current margins.
Solution Approach 2:
The buffer amplifier uses negative feedback to maintain a virtual ground at its output node. This feedback mechanism allows the amplifier to actively counteract CM signals and maintain low impedance without requiring excessive power consumption. The feedback loop continuously adjusts the output to keep the CM node at virtual ground potential.
3Power
If multiple stages are added to increase gain, then amplification capability is improved, but CM disturbance increases
Solution Approach 1:
The patent segments the CM termination function across multiple stages by providing dedicated CM termination at each amplifier stage. Each stage has its own buffer amplifier and capacitor combination that independently suppresses CM signals at that particular stage, preventing CM accumulation across the multi-stage amplifier chain.
Solution Approach 2:
The patent applies preliminary action by suppressing CM signals at each intermediate stage before they can propagate to subsequent stages. By placing CM termination circuits at each stage, the design proactively prevents CM disturbances from building up across multiple amplification stages, rather than attempting to correct them at the final output.
Data Source
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AI summary
A multi-stage amplifier (100) includes a plurality of single-stage differential amplifiers (102, 104) that are connected in a cascade arrangement. The single-stage differential amplifiers (102, 104) include a first single-stage differential amplifier (102) and a second single-stage differential amplifier (104). The first single-stage differential amplifier (102) has a first output network (116). The second single-stage differential amplifier (104) has a second output network (126). A common-mode (CM) node of the second output network (126) is shorted to a CM node of the first output network (116).