Multistage Comparator Circuit Without Current Mirrors
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Solution Overview
Problem
Current I/O interfaces face challenges in achieving high gain and low current consumption due to inadequate reference voltage generation methods, such as current mirrors, which lead to increased power consumption and reduced efficiency.
Innovation Solution
A multistage comparator circuit design that converts differential signal pairs into single-ended signals with multiple stages of amplification, eliminating the need for current mirrors to generate reference voltages, thereby reducing power consumption and enhancing signal gain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If current mirrors are used to generate reference voltages for comparator stages, then reference voltage generation is achieved, but power consumption increases and gain is insufficient
Solution Approach 1:
The patent removes the current mirror circuitry from the comparator design, extracting the problematic power-consuming component while retaining the essential voltage reference generation function through alternative means (direct biasing circuits), thereby reducing power consumption without sacrificing gain
Solution Approach 2:
The patent changes the operating parameters of the comparator stages by using direct biasing instead of current mirrors, adjusting the voltage and current parameters to achieve both low power consumption and high gain performance simultaneously
2Power
If current mirrors are used to provide reference voltages to inverter stages, then voltage reference is established, but additional circuit power is consumed
Solution Approach 1:
The patent extracts and eliminates the current mirror blocks from the signal path, replacing them with direct biasing circuits that provide reference voltages to inverter stages without the additional power consumption and gain loss associated with current mirrors
Solution Approach 2:
The comparator stages are designed to self-bias using integrated biasing circuits that automatically establish the required operating points without external current mirror control, reducing overall circuit power while maintaining signal gain
3Ease of operation
If digital inverters formed from nFET/pFET pairs are used, then inverter function is achieved, but no gain is produced
Solution Approach 1:
The patent merges the inverter function with gain generation by combining nFET/pFET pairs in a configuration that provides both logic inversion and signal amplification, eliminating the need for separate gain stages while maintaining ease of operation
Solution Approach 2:
The inverter stages are designed to perform multiple functions simultaneously: logic inversion, signal amplification, and level shifting, making them universal building blocks that eliminate the need for dedicated gain circuits and reduce overall power consumption
Data Source
AI summary
A method is provided for receiving a differential signal pair input at a first circuit stage and converting the differential signal pair input to a single-ended signal at a second circuit stage. The method also provides for receiving an output of the first circuit stage and an output of the second stage at a third circuit stage and transmitting an amplified signal output from the third circuit stage. The method allows for a 60 dB signal gain or more. A circuit is also provided that includes multiple circuit stages that can provide signal gain to an input differential signal pair. The circuit converts the differential pair into a single-ended signal and transmits the amplified signal as an output. The circuit provides the signal gain without using a current mirror. A computer readable storage device encoded with data for adapting a manufacturing facility to create an apparatus is also provided.


