Multi-Stage Physical Synthesis for ASIC and FPGA Design Optimization

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Solution Overview

Problem

Traditional physical synthesis techniques for ASICs and FPGAs are not effective in optimizing design goals beyond delay reduction, as they are typically performed at a single stage after placement and before routing, lacking efficiency in reducing area, power consumption, and improving routability.

Innovation Solution

Implementing physical synthesis at multiple stages of the CAD flow, including after design entry, technology mapping, placement, and routing, to perform circuit transformations that optimize for delay, area, power, and routability, using techniques like retiming, BDD-based resynthesis, and local rewiring.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If physical synthesis is performed at a single stage after placement and before routing, then delay optimization is improved, but area reduction, power consumption reduction, and routability improvement are not effectively optimized

Engineering Contradiction:
ImprovedelayVSAvoidoptimization capability for multiple goals
Core Design Contradiction:
Loss of timeVSAdaptability or versatility

Solution Approach 1:

The patent divides physical synthesis into multiple stages corresponding to different phases of the CAD flow (placement, routing, packaging). Each stage performs targeted optimizations appropriate to that phase, allowing comprehensive optimization across multiple goals including delay, area, power, and routability rather than being limited to a single post-placement stage.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If traditional physical synthesis is performed only after placement, then the process is simple, but it cannot effectively reduce area, power consumption, and improve routability

Engineering Contradiction:
Improvesynthesis process complexityVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent performs physical synthesis operations at multiple predetermined stages throughout the CAD flow rather than waiting until after placement. This preliminary and continuous application of synthesis techniques at appropriate stages enables effective optimization of power consumption, area, and routability before final implementation, rather than attempting corrections after all stages are complete.

Inventive Principle:
Principle #10Preliminary action

3Area of stationary object

If physical synthesis is performed at multiple stages, then optimization for area, power, and routability is improved, but the complexity of the CAD flow increases

Engineering Contradiction:
Improvecircuit areaVSAvoidCAD flow complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent implements a dynamic multi-stage physical synthesis approach where the synthesis process adapts to the current state of the design at each CAD flow stage. The system dynamically selects and applies appropriate synthesis transformations based on the design phase, balancing optimization effectiveness with manageable process complexity rather than applying all possible transformations at all stages.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8856702B1Method and apparatus for performing multiple stage physical synthesis
Publication Date: 2014.10.07 ALTERA CORP
  • US8856702B1 patent drawing
  • US8856702B1 patent drawing
  • US8856702B1 patent drawing

AI summary

A method for designing a system on a target device includes entering the system. The system is synthesized. The system is mapped. The system is placed on the target device. The system is routed. Physical synthesis is performed on the system immediately after more than one of the entering, synthesizing, mapping, placing and routing procedures.