Multi-State LDPC Bit Flipping for Better Error Correction

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Solution Overview

Problem

Existing LDPC decoding methods are inefficient due to their reliance on two-state systems, which limit error correction capabilities and require significant processor and memory resources when handling soft information.

Innovation Solution

The implementation of multi-state bit flipping decoders with variable and check nodes, allowing for iterative processing and updating of node values based on received indications, enabling the use of three or four states to improve decoding accuracy and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If two-state systems are used for LDPC decoding, then device complexity is reduced, but error correction capability deteriorates

Engineering Contradiction:
Improveerror correction capabilityVSAvoiddecoder complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the parameter of bit states from two-state (0, 1) to multi-state (at least three states including 0, 1, and erasure state). This allows the decoder to represent uncertain or unreliable bits with an erasure state, improving error correction capability by providing more nuanced information about bit reliability without significantly increasing device complexity.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If soft information is used for decoding, then decoding accuracy is improved, but processor and memory resource requirements increase

Engineering Contradiction:
Improvedecoding accuracyVSAvoidprocessor and memory resources
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent discretizes soft information into multi-state hard decisions (0, 1, erasure) rather than using continuous soft information values. This quantization approach maintains decoding accuracy by preserving reliability information through the erasure state while dramatically reducing processor and memory resource requirements by working with discrete states instead of continuous probabilities.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses simple discrete state values (0, 1, erasure) that can be stored and processed with minimal resources, replacing complex soft information representations. These discrete states act as simplified proxies that capture essential reliability information without requiring significant computational or memory resources.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS8694868B1Systems and methods for performing multi-state bit flipping in an LDPC decoder
Publication Date: 2014.04.08 MARVELL ASIA PTE LTD
  • US8694868B1 patent drawing
  • US8694868B1 patent drawing
  • US8694868B1 patent drawing

AI summary

Systems and methods are provided for decoding data using hard decisions and soft information. In particular, the systems and methods described herein are directed to decoders having variable nodes and check nodes, each with multiple states. The systems and methods include receiving, at a decoder during a first iteration, values for each of a plurality of variable nodes, and determining, during a second iteration, one or more indications for each of a plurality of check nodes based on the one or more values of the variable nodes received during the first iteration. The methods further include updating, at the decoder during the second iteration, the values for each of the variable nodes based on the values of the respective variable node received during the first iteration, and the indications for each of the plurality connected check nodes during the first iteration.