Multi-stream FFT Signal Processor for MIMO-OFDM Systems
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Solution Overview
Problem
MIMO-OFDM systems face increased hardware complexity due to the need for multiple FFT transformations in parallel, which complicates processing load and speed, especially when compared to SISO-OFDM systems, leading to a need for reduced computational complexity and memory usage.
Innovation Solution
A signal processor with a multiplexing device and a Fast Fourier Transformation device using a Radix-2 Single-path Delay Feedback architecture, where data streams are multiplexed and transformed using a pipeline with k stages, each with a single delay element, and controlled by specific internal signals to reduce the number of FFT blocks and memory requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple FFT transformation blocks are installed to process multiple data streams in parallel, then processing speed and reliability are improved, but hardware complexity and cost increase significantly
Solution Approach 1:
The patent merges multiple FFT transformation tasks into a single FFT block by multiplexing multiple input data streams through time-division. The single FFT block processes multiple streams sequentially in time, eliminating the need for multiple parallel FFT blocks while maintaining processing capability. This is achieved by organizing the input streams in a time-division multiplexed manner and using a single transform unit that cycles through processing different streams.
Solution Approach 2:
The single FFT block is designed to perform multiple functions by processing different data streams at different time intervals. Through time-division multiplexing, the same hardware unit serves multiple purposes, transforming different input streams without requiring dedicated hardware for each stream. This multi-functional approach reduces hardware complexity while maintaining processing speed.
2Productivity
If multiple FFT transformation blocks are installed to process multiple data streams in parallel, then processing capability is improved, but memory requirements increase
Solution Approach 1:
The patent combines multiple memory requirements into a single memory structure that serves multiple purposes. By using time-division multiplexing, a single memory unit stores data for multiple streams sequentially, eliminating the need for separate memory blocks for each stream. This reduces total memory requirements while maintaining the capability to process multiple streams in parallel.
3Speed
If straightforward parallel FFT processing is implemented, then processing speed is maintained, but computational complexity increases
Solution Approach 1:
The patent segments the processing time into discrete intervals, assigning different data streams to different time slots. This time-division segmentation allows a single FFT block to process multiple streams sequentially without interference. The computational complexity is managed by organizing the processing into structured time slots rather than requiring parallel computational blocks, reducing hardware complexity while maintaining processing speed.
Data Source
AI summary
The present invention proposes a signal processor for Fast Fourier Transformation, FFT, of MR, MR>1, input data streams of 2k samples each, supplied in parallel. After multiplexing the input data streams in an interlaced manner, the resulting stream is subjected to FFT. The FFT device has a pipeline architecture composed of k stages with a respective feedback path including a single delay element per each stage of the pipeline architecture. The delay element and timing signals are adapted to cope with FFT processing of the multiplexed streams using the single FFT device only. After processing, the FFT processed data stream is demultiplexed. The present invention also concerns a corresponding signal processing method.