Multithreaded SCL Polar Decoder for Concurrent LLR and Sorting
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Solution Overview
Problem
Current hardware implementations of successive cancellation list (SCL) polar decoding for cellular data communication face challenges in achieving high throughput and efficient utilization due to the sequential nature of LLR updating and sorting processes, leading to idle periods in circuitry and suboptimal performance in high-speed networks.
Innovation Solution
A multithreaded polar decoder circuit is designed to concurrently execute LLR updates and sorting operations across multiple threads, allowing the LLR update engine and sort engine to operate iteratively and sequentially cycle through different codewords, with synchronization logic coordinating thread operations to enhance throughput and reduce idle time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If sequential LLR updating and sorting processes are used in SCL polar decoding, then the decoding algorithm can be implemented with simple hardware structure, but the throughput is limited and hardware utilization is low due to idle periods
Solution Approach 1:
The decoding process is segmented into multiple independent threads, each handling different codewords or candidate paths. The LLR update engine and sort engine are divided into multiple functional units that can process different segments concurrently, transforming the sequential process into parallel operations that increase throughput without requiring a complete redesign of the hardware architecture
Solution Approach 2:
The LLR update engine performs preliminary computations of log-likelihood ratios and path metrics before the sorting operation. By preparing the path metrics in advance and maintaining ready queues for candidate paths, the system ensures that when sorting is needed, the data is already prepared, eliminating idle waiting time and improving hardware utilization
Solution Approach 3:
The multithreaded architecture ensures continuous useful action by piping results from one thread to the next. While one thread is sorting candidate paths, another thread is already updating LLRs for the next stage, and a third thread is preparing subsequent operations. This continuous pipeline eliminates idle periods and maximizes hardware utilization
2Productivity
If multithreaded concurrent execution of LLR update and sort engines is implemented, then throughput and hardware utilization are improved, but the circuit complexity and synchronization requirements increase
Solution Approach 1:
Ready queues and result queues serve as intermediaries between the LLR update engine and sort engine. These queues buffer data and coordinates the flow of information between concurrent threads, managing the complexity of synchronization by providing a standardized interface that abstracts the underlying coordination logic
Solution Approach 2:
The system uses periodic clock cycles and structured synchronization points to coordinate multithreaded operations. By organizing concurrent execution into regular periodic cycles with defined phases for LLR updating, sorting, and result collection, the system manages circuit complexity through predictable, rhythmic operation patterns rather than arbitrary concurrent access
3Reliability
If iterative traversal of binary tree for multiple codewords is performed, then decoding accuracy is maintained, but processing time increases due to sequential operations
Solution Approach 1:
The system transitions from sequential processing of codewords to parallel processing by adding a thread dimension. Multiple threads traverse different branches of the binary tree simultaneously, each maintaining decoding accuracy through proper LLR updates while reducing overall processing time through concurrent execution across the thread dimension
Solution Approach 2:
Multiple decoding operations for different codewords are merged into a single multithreaded processing framework. The LLR update engine and sort engine handle multiple codewords in parallel within the same hardware structure, combining what would traditionally require separate sequential processing into unified concurrent operations that maintain accuracy while reducing time
Data Source
AI summary
A polar decoder circuit can execute successive cancellation list polar decoding on multiple threads concurrently. An LLR update engine of the polar decoder circuit and a sort engine of the polar decoder circuit can operate concurrently, with the LLR update engine computing updated path metrics for one codeword while the sort engine sorts candidates for one or more other codewords according to path metrics already computed by the LLR update engine. Threads corresponding to different codewords can cycle sequentially between the LLR update engine and the sort engine.