Multi-threaded Processor Fault Tolerance via Slave Thread Synchronization
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Solution Overview
Problem
Existing fault tolerant and fault detecting processors either require multiple cores for redundancy or separate recovery systems, which are not suitable for applications with space and power constraints, such as battery-powered devices, where efficient error detection and recovery are necessary.
Innovation Solution
A multi-threaded processor design with a master and slave thread, where the master thread prioritizes execution and the slave thread catches up to synchronize and compare register states, allowing continued execution if matches are found, and rerunning instructions if errors are detected, thereby enabling fault detection and tolerance within a single core.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple cores are used for redundancy in fault tolerant systems, then reliability is improved, but device complexity and power consumption increase
Solution Approach 1:
The processor is segmented into a master thread and a slave thread, where the slave thread serves as a lightweight redundant execution unit. Instead of using multiple full processor cores, the patent divides a single core into two thread contexts that can execute independently, providing fault tolerance through thread-level redundancy rather than core-level redundancy.
Solution Approach 2:
The slave thread acts as a copy of the master thread's execution context, maintaining separate register banks and program counters. When the master thread executes instructions, the slave thread copies and executes the same instructions in parallel, creating a redundant execution path that can detect and correct faults without requiring multiple complete processor cores.
2Reliability
If multiple cores are used for redundancy in fault tolerant systems, then reliability is improved, but power consumption increases
Solution Approach 1:
The processor resources are segmented such that the slave thread shares many physical resources with the master thread (execution units, cache, memory interface) while maintaining separate logical state (register banks, program counters). This segmentation allows fault tolerance through redundancy without duplicating the entire processor, significantly reducing power consumption compared to multiple full cores.
Solution Approach 2:
The slave thread serves multiple functions: it acts as a redundant execution path for fault tolerance, can serve as a backup for the master thread, and can independently execute instructions when the master thread stalls. This multi-functionality allows a single processor core to provide fault tolerance services without requiring additional dedicated hardware that would increase power consumption.
3Reliability
If separate recovery systems are used for error detection and resolution, then reliability is improved, but device complexity increases
Solution Approach 1:
The error detection and recovery functions are merged into the normal multi-threaded execution mechanism. The slave thread continuously executes alongside the master thread, and comparison of their register states at synchronization points provides automatic error detection. Recovery is achieved by switching to the slave thread's clean state, eliminating the need for separate recovery hardware or software systems.
Solution Approach 2:
The processor performs self-diagnosis and self-recovery through the multi-threaded mechanism. The slave thread serves as a built-in backup that can detect errors in the master thread through register comparison and automatically take over execution when faults are detected, providing error recovery capabilities without external or separate recovery systems.
4Reliability
If the slave thread continuously executes to catch up with the master thread, then fault detection capability is improved, but productivity decreases due to redundant execution
Solution Approach 1:
Instead of continuous comparison, the patent implements periodic comparison at synchronization points (memory writes, cache misses, or fixed instruction counts). The slave thread executes periodically to catch up with the master thread, and register comparisons occur at these periodic intervals, reducing the overhead of continuous monitoring while maintaining effective fault detection coverage.
Solution Approach 2:
The slave thread executes preliminary actions in parallel with the master thread, maintaining its own execution pipeline. When the slave thread catches up to the master thread at a synchronization point, the comparison is performed. This preliminary parallel execution allows the system to prepare for potential fault detection without stalling the master thread's progress, improving overall productivity.
Data Source
AI summary
Fault tolerant and fault detecting multi-threaded processors are described. Instructions from a program are executed by both a master thread and a slave thread and execution of the master thread is prioritized. If the master thread stalls or reaches a memory write after having executed a sequence of instructions, the slave thread executes a corresponding sequence of instructions, where at least the first and last instructions in the sequence are the same as the sequence executed by the master thread. When the slave thread reaches the point at which execution of the master thread stopped, the contents of register banks for both the threads are compared, and if they are the same, execution by the master thread is allowed to continue, and any buffered speculative writes are committed to the memory system.