Multi-Tier Substrate Flip-Chip IC Package System
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional integrated circuit packages face challenges in reducing size and increasing functionality while maintaining manufacturing yield, especially in applications where space is limited, due to large footprints and inefficient wirebonding or redistribution layer interfaces.
Innovation Solution
A multi-tier substrate system with multiple tiers and connectors for integrated circuits, allowing direct attachment of flipchip integrated circuits and eliminating the need for bond wires and redistribution layers, while incorporating a heatsink for improved thermal dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple die are stacked within a single package to increase circuit density, then the amount of circuitry in the package is increased, but the package requires inefficient wirebonding or redistribution layer interfaces which increases device complexity
Solution Approach 1:
The patent extracts and eliminates the wirebonding and redistribution layer interfaces from the multi-die package system. By using direct flip-chip interconnection between stacked die, the complex intermediate connection structures are removed, achieving simple direct electrical contact between layers while maintaining high circuit density.
Solution Approach 2:
The patent transitions from planar two-dimensional packaging to three-dimensional vertical stacking. Multiple die are arranged in vertical layers rather than side-by-side, enabling increased circuitry capacity within the same footprint while using direct vertical interconnections that eliminate the need for complex redistribution layers.
2Area of stationary object
If the package footprint is reduced for space-constrained applications, then the package area on the circuit board is reduced, but the ability to dissipate heat and manage thermal expansion becomes more difficult
Solution Approach 1:
The patent moves thermal management from a two-dimensional surface problem to a three-dimensional vertical problem. Heat sinks and thermal vias are integrated into the vertical stack structure, allowing heat to be conducted through the thickness of the package rather than requiring large surface area for dissipation, thus enabling small footprint packages with effective thermal management.
Solution Approach 2:
The patent integrates multiple functions into the vertical interconnection structures. The same via structures that provide electrical connection between stacked die also serve as thermal conduction paths, and the package substrate simultaneously provides mechanical support, electrical interconnection, and thermal management functions, achieving multi-functionality in a compact form.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces package size, enhances signal propagation, and improves thermal performance, making it suitable for both sensitive and high-power applications without increasing the package area.
Implementation Method 1
incorporating a heatsink for improved thermal dissipation
Implementation Method 2
heatsink for improved thermal dissipation
Data Source
AI summary
An integrated circuit package system includes forming a multi-tier substrate, and attaching a plurality of integrated circuits on the multi-tier substrate.