Mura Compensation Circuit Block Segmentation Memory Reduction

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Solution Overview

Problem

Existing Mura compensation methods require excessive memory capacity to store pixel characteristics for display panels, making it inefficient to detect and compensate for brightness differences across pixels.

Innovation Solution

A Mura compensation device and data processing circuit that calculate a representative compensation value for each block of the display panel, using a global gain to produce a final compensation value, thereby reducing memory usage and improving accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If pixel characteristics for the entire panel are stored in memory to perform Mura compensation, then compensation accuracy is improved, but memory capacity requirement becomes excessively high

Engineering Contradiction:
ImproveMura compensation accuracyVSAvoidmemory capacity
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The display panel is divided into multiple blocks, and Mura compensation is performed separately for each block rather than for the entire panel at once. This segmentation allows the system to process and store compensation data in smaller, manageable units, significantly reducing the total memory capacity required while maintaining compensation accuracy within each block.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of applying a uniform compensation approach across the entire panel, the patent implements localized compensation by calculating and storing representative compensation values for each individual block. This local quality approach ensures that compensation is tailored to the specific characteristics of each block, improving overall accuracy while using minimal memory resources.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If a single global gain is calculated for all pixels, then memory usage is reduced, but compensation accuracy may be compromised

Engineering Contradiction:
Improvememory capacityVSAvoidMura compensation accuracy
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent segments the panel into multiple blocks and calculates a representative compensation value for each block rather than using a single global gain for the entire panel. This segmentation allows the system to use minimal memory (storing only one value per block) while maintaining compensation accuracy by accounting for local variations in each block.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of applying excessive memory resources to store individual pixel characteristics, the patent uses a partial action approach by storing only representative compensation values for each block. This partial storage strategy is sufficient to achieve effective Mura compensation without the excessive memory capacity that would be required for full pixel-level storage.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11961445B2Mura compensation device and data processing circuit for Mura compensation
Publication Date: 2024.04.16 LX SEMICON CO LTD
  • US11961445B2 patent drawing
  • US11961445B2 patent drawing
  • US11961445B2 patent drawing

AI summary

A data processing circuit according to an embodiment may include a reception circuit configured to receive image data including grayscale values associated with pixels disposed in a display panel. The data processing circuit may include a compensation circuit configured to calculate a final compensation value by multiplying a representative compensation value of each area and a global gain, and to produce converted image data. The data processing circuit may include a memory storing a representative compensation value associated with a grayscale value of each area of the display panel, and may include a transmission circuit configured to transmit the converted image data to a data driving circuit.