Mura Defect Elimination in Image Displays via External Coefficient Compensation
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Solution Overview
Problem
Conventional image display systems face challenges in eliminating mura defects due to variations in thin film transistor (TFT) electronic characteristics, leading to uneven pixel brightness, and existing solutions either require additional TFTs, reducing aperture ratio, or require large memory for external compensation techniques.
Innovation Solution
An image display system that collects reference data and adjusts gray levels using a coefficient generator, ASIC, and memory to generate mura compensation coefficient sets, transforming original gray levels into mura-eliminated gray levels without adding components to the pixel structure, thus reducing mura defects and satisfying gamma, white point, and peak brightness settings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If mura compensation devices are added to pixel circuits, then mura defects can be eliminated, but the aperture ratio decreases and circuit size increases
Solution Approach 1:
The invention extracts the mura compensation function from the pixel circuit itself and relocates it to external components (memory device and processing circuit). By storing compensation coefficients externally and reading them into the pixel circuit only when needed, the pixel structure remains simple with minimal additional components, thus maintaining high aperture ratio while achieving mura defect elimination.
Solution Approach 2:
The invention introduces compensation coefficients as an intermediary element that mediates between the display control signal and the pixel output. These coefficients, stored externally in memory, allow the system to compensate for mura defects without modifying the fundamental pixel circuit structure, thereby avoiding aperture ratio reduction.
2Manufacturing precision
If voltage driving type mura compensation device is used, then threshold voltage variations can be compensated, but at least five TFTs are required per pixel
Solution Approach 1:
The invention extracts the complex compensation logic and multiple TFT structures from the pixel circuit and relocates them to external memory and processing circuits. Only minimal additional TFTs (1-2 per pixel) are needed in the pixel circuit itself, compared to the 5+ TFTs required by conventional voltage driving compensation methods.
Solution Approach 2:
The invention replaces the mechanical/electrical complex TFT-based compensation circuits with a data-processing approach using external memory and digital processing circuits. Compensation coefficients are stored as data and processed algorithmically, substituting complex hardware circuits with simpler data manipulation.
3Device complexity
If current driving type mura compensation device is used, then fewer TFTs are required, but performance degrades at low gray levels
Solution Approach 1:
The invention changes the operating parameters and compensation strategy by using dual-type compensation coefficients (both voltage driving and current driving types) stored in external memory. The processing circuit selects and applies the appropriate coefficient type based on the current display conditions, including gray level ranges, thereby maintaining high performance across all gray levels including low gray levels.
4Manufacturing precision
If external compensation technique with large memory is used, then reference data can be stored, but memory size becomes excessively large
Solution Approach 1:
The invention segments the compensation data into different types (voltage driving type coefficients and current driving type coefficients) and organizes them in structured formats in external memory. This segmentation allows efficient storage and selective retrieval of only the necessary compensation data, significantly reducing memory size compared to storing all possible reference data.
Solution Approach 2:
The invention performs preliminary calculation and organization of compensation coefficients during the manufacturing process, storing pre-calculated coefficients in external memory. This preliminary action eliminates the need for large real-time computation and data storage during operation, reducing the required memory size while maintaining compensation accuracy.
Data Source
AI summary
Image display techniques for eliminating mura defects, which collects reference data and adjusts the gray levels. The image display systems comprising a plurality of pixels, a memory, and an ASIC. Each of the pixels relates to a mura compensation coefficient set. The mura compensation coefficient sets of the pixels are generated by a coefficient generator. The memory stores the mura compensation coefficient sets of the pixels. The ASIC reads the mura compensation coefficient sets from the memory. With different mura compensation coefficient sets, the ASIC serves as different mura compensation function sets. Each mura compensation function set relates to one of the aforementioned pixels and is used for transforming an original gray level to a mura-eliminated gray level to drive the corresponding pixel.