Mushroom PCM Drift Mitigation via Sidewall Liner
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Solution Overview
Problem
Phase Change Memory (PCM) devices suffer from resistance drift, particularly in the amorphous phase, which complicates multi-level cell operations and requires increased programming voltage due to joule heating concentrated in resistive liners, leading to thermal inefficiency and reduced dynamic range.
Innovation Solution
A mushroom-type PCM device design where the phase change material is in direct contact with both the drift-mitigation liner and the bottom electrode, eliminating the need for a resistive liner on top of the bottom electrode, thus mitigating resistance drift without increasing programming voltage and preserving a larger dynamic range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a resistive liner is placed on top of the bottom electrode to mitigate resistance drift, then resistance drift is reduced, but the SET state resistance increases and programming voltage increases
Solution Approach 1:
The patent extracts the resistive liner material from the position on top of the bottom electrode and relocates it to form sidewall structures only. This removal from the problematic position eliminates the concentration of joule heating and unwanted resistance addition while preserving the drift mitigation function through the sidewall configuration
Solution Approach 2:
The patent transitions the liner from a planar top-surface configuration to a three-dimensional sidewall structure. By moving the liner to the vertical sidewalls of the PCM element, the design achieves drift mitigation through a different spatial dimension that does not interfere with the bottom electrode-PCM interface or concentrate heat in the same manner
2Reliability
If a resistive liner is placed on top of the bottom electrode to mitigate resistance drift, then resistance drift is reduced, but the dynamic range decreases
Solution Approach 1:
The patent extracts the resistive liner from the top surface position where it would add unwanted resistance in series with the SET path. By removing it from this position and placing it only on sidewalls, the harmful effect on dynamic range is eliminated while the beneficial drift mitigation function is preserved through the sidewall configuration
Solution Approach 2:
The patent applies the liner material selectively only to the sidewall regions rather than uniformly across the top surface. This localized application ensures that the liner provides drift mitigation where needed at the PCM-liner interface without adding series resistance that would reduce the dynamic range of the memory cell
3Reliability
If a resistive liner is placed on top of the bottom electrode to mitigate resistance drift, then resistance drift is reduced, but thermal efficiency decreases
Solution Approach 1:
The patent extracts the resistive liner from the top surface position where it would concentrate joule heating. By removing it from this position, the harmful thermal effect is eliminated while the drift mitigation function is preserved through the sidewall configuration that does not interfere with the primary heating path
Solution Approach 2:
The sidewall liner acts as an intermediary structure that provides drift mitigation without becoming the primary site for joule heating. The configuration allows thermal energy to pass through the PCM element efficiently while the liner provides its protective function at the interfaces, serving as a mediator that doesn't obstruct the thermal path
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves resistance drift mitigation without increasing programming voltage, maintains a large SET/RESET resistance ratio, and reduces thermal inefficiency, enabling efficient low-voltage operations for multi-level cell applications.
Implementation Method 1
Phase Change Memory (PCM) is based on a chalcogenide glass material, which changes its phase from crystalline to amorphous and back again when suitable electrical currents are applied
Implementation Method 2
Phase change materials suffer from resistance-drift, prominently in the amorphous phase, where resistance increases over time according to a power law
Data Source
AI summary
A mushroom-type Phase-Change Memory (PCM) device includes a substrate, a lower interconnect disposed in the substrate, a first dielectric layer disposed on the substrate, a bottom electrode disposed in the first dielectric layer and extending above an upper surface of the first dielectric layer, a type drift-mitigation liner encircling an upper portion of the bottom electrode extending above the upper surface of the first dielectric layer, a PCM element disposed on the liner and an upper surface of the bottom electrode, a top electrode disposed on the PCM element, and a second dielectric layer disposed on an exposed portion of the first dielectric layer and the top electrode, wherein the second dielectric layer is disposed on sidewalls of the liner, the PCM element, and the top electrode.


