Mutated Integrated Circuit Quality Rating Method
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Solution Overview
Problem
The increasing complexity and size of computer programs lead to higher error rates in integrated circuits, making it difficult to effectively test and verify their quality, especially due to the inefficiencies in software simulation methods which slow down the verification process.
Innovation Solution
A method involving the creation of a mutated integrated circuit with functional mutations, where the input and output data are influenced and compared to the unmutated circuit's expected outputs, allowing for a rapid quality assessment of the computer program used in the verification process, without the need to produce the unmutated circuit itself, utilizing field programmable gate arrays (FPGAs) for implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If software simulation is used to test the integrated circuit, then the quality and completeness of the computer program can be checked, but the verification speed is significantly reduced
Solution Approach 1:
The patent creates a mutated version of the integrated circuit design (a copy with intentional modifications) to test the computer program's quality. Instead of simulating the original circuit, the method uses a copied and modified version that can be quickly synthesized and tested, maintaining assessment accuracy while improving verification speed
Solution Approach 2:
The patent replaces software simulation (a time-consuming computational process) with hardware synthesis and physical testing on FPGAs. By substituting the mechanical/software-based simulation approach with hardware-based implementation and mutation testing, the method achieves faster verification while maintaining quality assessment accuracy
2Adaptability or versatility
If the computer program complexity increases to handle larger integrated circuits, then more components can be tested, but the error rate in the computer program increases
Solution Approach 1:
The patent implements a self-testing mechanism where the computer program is automatically tested against mutated versions of the circuit it is supposed to verify. The program performs quality assessment on itself through mutation testing, automatically identifying errors and gaps without requiring external manual verification
Solution Approach 2:
The patent applies preliminary anti-action by intentionally introducing mutations (errors) into the circuit design before testing. This preemptive approach allows the test system to proactively identify weaknesses in the computer program's quality assessment capabilities, preventing errors from going undetected during actual circuit verification
3Measurement precision
If comprehensive testing is performed to ensure program quality, then verification accuracy improves, but the testing time increases
Solution Approach 1:
The patent applies partial action by focusing testing efforts on mutated versions of the circuit rather than exhaustively testing all possible scenarios of the original circuit. By introducing targeted mutations and testing against these modified versions, the method achieves sufficient verification accuracy without requiring exhaustive comprehensive testing, thus reducing testing time
Data Source
AI summary
The invention relates to a method for rating the quality of a computer program whose execution involves an integrated circuit's input data and output data being influenced, comprising(a) provision of a mutated integrated circuit which is obtained by incorporating one or more functional mutations into the (unmutated) integrated circuit;(b) influencing of the mutated integrated circuit's input data and output data, with the output data from the mutated integrated circuit being recorded;(c) comparison of the output data obtained in this manner from the mutated integrated circuit with the output data which the computer program expects when the unmutated integrated circuit is influenced; and(d) rating of the quality of the computer program on the basis of the comparison results.