Multiplexed Digital PID Filter Architecture for Control Loops
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Solution Overview
Problem
Digital control loops in applications like switching power supplies and robotic controllers face challenges in maintaining high resolution while reducing costs and power consumption, as conventional approaches require high-cost and high-power circuitry.
Innovation Solution
A multiplexed digital proportional-integral-derivative (PID) filter operates in different states during sub-cycles of a system cycle, using a single multiplier and adder to calculate control signal portions, achieving original or increased resolution at lower cost with negligible latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional digital PID filter implementation is used, then high resolution control is achieved, but circuit cost and power consumption increase significantly
Solution Approach 1:
The patent combines multiple PID calculation functions (proportional, integral, derivative) into a single unified digital filter structure. By merging the functionality of multiple separate calculators into one shared digital filter with multiplexed input paths, the circuit implements high-resolution control without requiring proportionally high-cost circuitry for each individual PID component.
Solution Approach 2:
The digital filter is designed as a universal computing resource that serves multiple PID calculation purposes. A single filter structure processes error signals for proportional control, integral control, and derivative control through different input configurations and gain settings, eliminating the need for dedicated high-cost circuitry for each control function.
2Measurement precision
If multiple multipliers and adders are used in digital PID filter, then calculation accuracy is improved, but power consumption increases
Solution Approach 1:
The patent merges multiple computational operations into shared hardware resources. Instead of implementing separate multipliers and adders for each PID term (proportional, integral, derivative), the invention uses a single digital filter that is time-multiplexed to perform all necessary calculations, thereby maintaining calculation accuracy while dramatically reducing power consumption.
Solution Approach 2:
The digital filter operates in periodic cycles, sequentially processing different PID calculation tasks. The filter is enabled during specific subcycles to compute proportional, integral, and derivative terms in sequence rather than simultaneously, allowing the same hardware to perform multiple functions over time with reduced instantaneous power requirements.
3Reliability
If analog implementation is used, then performance under transient and quiescent conditions is maintained, but programmability and stability are reduced
Solution Approach 1:
The patent replaces the analog mechanical/electrical system with a digital system. By implementing the PID filter in the digital domain using software-configurable parameters, the invention achieves both the stability and performance of analog systems while adding programmability and adaptability that allow dynamic reconfiguration of control parameters without hardware changes.
Data Source
AI summary
A multiplexed digital proportional-integral-derivative filter receives error signal samples and operates in different states during sub-cycles of a single system cycle. A single multiplier and a single adder within the filter calculate at least portions of a proportional control signal, an integral control signal and a derivative control signal for one error signal sample during successive sub-cycles. The calculated control signal portions are aggregated to produce a filtered error signal for the respective error signal sample. The original resolution at lower cost, or increased resolution at the original cost, are achieved, as well as full programmability of loop gain with only negligible increase in loop latency.