Medium-Voltage Converter Topology for Lower Power Fluctuation
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Solution Overview
Problem
Existing converters for transferring power between medium and low voltage sides are complex and exhibit significant power fluctuations, making them inefficient for practical applications.
Innovation Solution
A converter design comprising an AC/DC converter stage, a DC link with series-connected DC/DC converters, three switchable branches with full-bridge circuits, and a controller to manage branch operations, ensuring efficient power transfer with reduced complexity and power fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional PSUs employ a low-frequency transformer to step-down MV grid voltage, then LV PFC rectifiers can be employed, but the device complexity and size increase
Solution Approach 1:
The patent changes the operating frequency parameter from low-frequency (traditional transformer) to medium-frequency (MFT-based converter), enabling compact realization while maintaining power transfer capability. The MFT operates at higher frequencies, allowing smaller magnetic components and reduced overall device complexity.
Solution Approach 2:
The patent replaces the traditional mechanical/electromagnetic transformer system with a power electronic converter system based on MFTs and semiconductor switches. This substitution enables more flexible control, reduced size, and integrated functionality while maintaining galvanic isolation and power transfer capabilities.
2Adaptability or versatility
If series connections of converter cells are employed to handle high MV levels, then bidirectional power flow is supported, but the device complexity increases and single-phase power processing with large fluctuations occurs
Solution Approach 1:
The patent merges multiple converter cells into a unified three-phase architecture where phases are combined at a common star point. This integration reduces overall complexity compared to separate single-phase converters while maintaining bidirectional power flow capability through the unified control system.
Solution Approach 2:
The patent implements dynamic control strategies that adaptively manage power distribution across phases. The controller dynamically adjusts switching patterns and power flow paths based on real-time conditions, enabling efficient handling of power fluctuations and maintaining versatility without requiring complex fixed architectures.
3Reliability
If cascaded-H-bridge structure is used with multiple converter cells per phase, then full functionality is achieved, but switching losses and voltage stress on semiconductors increase
Solution Approach 1:
The patent uses partial action by implementing a simplified converter structure that achieves sufficient PFC functionality without the full complexity of cascaded-H-bridge configurations. The three-phase design with common star point provides adequate power factor correction while using fewer switching devices, thereby reducing switching losses and voltage stress.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed converter achieves a simpler configuration with reduced switching losses and voltage stress on active semiconductors, resulting in a more compact and efficient power transfer solution with lower power fluctuations.
Implementation Method 1
Each of the switchable branches comprises, in a series connection between a respective one of the three AC input terminals and a common star point, an inductor and at least one full-bridge circuit
Data Source
Figure 1(a)~2
Figure 3~4(g)
Figure 5(a)~5(c)
AI summary
A converter (100) for transferring power from a medium voltage side (MV) to a low voltage side (LV) or vice-versa is provided. The converter comprises an AC/DC converter stage (CS) configured to be connected to a three-phase medium-voltage AC power source (va, vb, vc) at the medium voltage side, the AC/DC converter stage (CS) having three AC input terminals (A, B, C) for the respective AC phases of the medium-voltage AC power source (va, vb, vc), and having a positive voltage output (P) and a negative voltage output (N); a DC link (DCL) comprising at least one first DC/DC converter (OC1, OC2) and at least one second DC/DC converter (OC3, OC4), wherein input sides of the at least one first and second DC/DC converters (OC1, OC2, OC3, OC4) are connected in series between the positive output (P) and the negative output (N) of the AC/DC converter stage (CS), with a midpoint (M) between the at least one first DC/DC converter (OC1, OC2) and the at least one second DC/DC converter (OC3, OC4); three switchable branches (BR1, BR2, BR3), each of the switchable branches (BR1, BR2, BR3) comprising, in a series connection between a respective one of the three AC input terminals (A, B, C) and a common star point (S), an inductor (LA, LB, LC) and at least one full-bridge circuit (FA1...FAj; FB1...FBj; FC1...FCj), wherein the star point (S) is directly connected to the midpoint (M) of the DC link (DCL); and a controller (CTL) configured to control the first and second DC/DC converters (OC1, OC2, OC3, OC4) and the full-bridge circuits (FA1...FAj; FB1...FBj; FC1...FCj) such that, when the switchable branch (BR1, BR2, BR3) that, at the point in time of performing the control, has the highest phase voltage among the three AC phases is referred to as the high branch, the switchable branch (FA1...FAj; FB1...FBj; FC1...FCj) that, at the point in time of performing the control, has the lowest phase voltage among the three AC phases is referred to as the low branch and the remaining switchable branch (FA1...FAj; FB1...FBj; FC1...FCj) is referred to as the mid branch, the at least one full-bridge circuit (FB1...FBj) of the mid branch (BR2) and the at least one full-bridge circuit (FA1...FAj; FC1...FCj) of either the high branch (BR1) or the low branch (BR3) are operated to impress a desired mid-branch current (i_midm) and the at least one full-bridge circuit (FA1...FAj; FC1...FCj) in the other one of the high branch (BR1) and the low branch (BR3) is turned off.