N-Bank Memory Array Storage for Parallel Data Access
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Solution Overview
Problem
Current data processing systems are inefficient in selectively processing rows and columns of data arrays, as they often require multiple memory accesses, leading to suboptimal performance in operations like image processing and frequency transforms.
Innovation Solution
The system employs an N-bank memory arrangement where each data unit in a row or column of an N×N data unit array is stored in a different memory bank, allowing for parallel access and symmetrical read/write operations, thereby reducing the number of clock cycles required for processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is stored in conventional memory arrangements, then memory capacity is achieved, but multiple memory accesses are required for row/column processing leading to inefficiency
Solution Approach 1:
The memory system is divided into N independent memory banks, each capable of parallel access. Data units of an N×N array are distributed across these banks such that each row and each column can be accessed by different banks simultaneously, enabling row and column processing in a single clock cycle without conventional memory access conflicts.
Solution Approach 2:
The patent introduces a bank dimension to the traditional linear memory organization. By mapping data units to memory banks using a two-dimensional banking scheme where data unit (x, y) maps to bank (x mod N, y mod N), the system enables simultaneous access to multiple data units that would otherwise require sequential access in conventional linear memory.
2Ease of operation
If data is stored to allow selective row/column processing, then processing capability is improved, but memory access complexity increases
Solution Approach 1:
The patent employs asymmetric data placement within the symmetric memory bank structure. By storing data units in a specific pattern across banks where data unit (x, y) is placed in bank (x mod N, y mod N), the system achieves symmetric row and column access performance despite the asymmetric distribution of individual data units across the memory banks.
Data Source
AI summary
In a data processing system that comprises a memory 8 comprising N memory banks 11, a memory controller is configured to store one or more N data unit×N data unit arrays of data in the memory 8 such that each data unit in each row of each N×N data unit array is stored in a different memory bank of the N memory banks 11, and such that each data unit in each column of each N×N data unit array is stored in a different memory bank of the N memory banks 11.