N-Channel Driver Circuit Layout for Fast Stable Display Driving

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Solution Overview

Problem

Existing driver circuits for display devices face challenges in achieving high operational stability, increased operating speed, reduced power consumption, and a smaller footprint while maintaining high reliability.

Innovation Solution

The proposed driver circuit includes a specific configuration of transistors and capacitors, utilizing n-channel transistors to enhance on-state current and reduce channel width, thereby increasing operating speed and reducing the circuit's footprint. The circuit operates in synchronization with clock signals to control the output potential.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If conventional driver circuit configurations are used, then the circuit can operate, but the footprint is large and power consumption is high

Engineering Contradiction:
Improvecircuit footprintVSAvoidoperational stability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent changes the transistor type parameter from p-channel to n-channel, which fundamentally alters the electrical characteristics. N-channel transistors provide higher mobility and lower on-resistance, enabling the circuit to achieve the same function with smaller dimensions and lower power consumption while maintaining reliability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The driver circuit is segmented into multiple independent transistor stages (first transistor, second transistor, third transistor, fourth transistor) that can be independently optimized. This segmentation allows each component to be sized efficiently, reducing the overall footprint while maintaining the required operational stability through distributed functionality

Inventive Principle:
Principle #1Segmentation

2Reliability

If the circuit is designed for high reliability, then operational stability is achieved, but the circuit complexity increases

Engineering Contradiction:
Improveoperational stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By changing the fundamental parameter of transistor type to n-channel, the patent achieves higher reliability through improved electrical characteristics (higher mobility, lower noise) without increasing complexity. The uniform use of n-channel transistors simplifies the circuit design compared to mixed-type configurations

Inventive Principle:
Principle #35Parameter changes

3Speed

If the circuit operates at high speed, then operating speed is increased, but power consumption increases

Engineering Contradiction:
Improveoperating speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent exploits the inherent parameter advantage of n-channel transistors, which have higher electron mobility compared to hole mobility in p-channel transistors. This parameter change enables faster switching speeds and higher operating frequencies while the efficient current control characteristics of n-channel devices reduce the power consumption penalty associated with high-speed operation

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250293685A1Driver circuit
Publication Date: 2025.09.18 SEMICON ENERGY LAB CO LTD
  • US20250293685A1 patent drawing
  • US20250293685A1 patent drawing
  • US20250293685A1 patent drawing

AI summary

A novel semiconductor device is provided. A first terminal of a first transistor is electrically connected to a first terminal of a second transistor and a first wiring. A gate of the first transistor is connected to a first terminal of a fourth transistor and a first terminal of a fifth transistor. A second terminal of the fifth transistor is connected to a gate of the fifth transistor, a first terminal of a third transistor, and a first terminal of a first capacitor. A second terminal of the third transistor and a second terminal of the fourth transistor are connected to a second wiring. A second terminal of the first transistor is connected to a third wiring. A second terminal of the second transistor is connected to a fourth wiring. A gate of the third transistor and a gate of the fourth transistor are connected to a fifth wiring. A second terminal of the first capacitor is connected to a sixth wiring.