N-Face p-GaN Gate Structure for Stable E-Mode GaN HEMTs

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing manufacturing processes for AlGaN/GaN High Electron Mobility Transistors (HEMTs) face challenges in achieving enhancement-mode devices due to difficulties in precisely controlling the etching of p-type semiconductor materials, leading to instability and reliability issues, particularly in power switching applications.

Innovation Solution

A semiconductor structure and manufacturing method involving a p-type GaN-based semiconductor layer with an N-face surface is developed, allowing for easier etching control and stability by reversing the polarity of the p-type Ga-face GaN-based material using a polarity reversal element like Mg, and selectively etching the p-type GaN-based semiconductor layer to create a high-quality Schottky gate with adjustable work function.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a p-type semiconductor material is disposed in the gate region to reduce carrier concentration, then enhancement-mode device performance is improved, but selective etching precision deteriorates leading to overetching and device instability

Engineering Contradiction:
Improvedevice stabilityVSAvoidetching thickness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent inverts the conventional Ga-face polarity to use N-face polarity for the p-type GaN semiconductor layer. This polarity inversion fundamentally changes the etching characteristics, making the layer much more resistant to selective etching processes. The N-face orientation prevents overetching while maintaining the p-type doping effect in the gate region, thereby resolving the contradiction between achieving enhancement-mode performance and maintaining manufacturing precision.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent changes the crystallographic orientation parameter from Ga-face to N-face for the p-type GaN layer. This parameter change transforms the etching behavior from highly selective and difficult to control to much more stable and predictable. The N-face orientation provides inherent etching resistance that simplifies process control while maintaining the electrical performance benefits of p-type doping in the gate region.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If selective etching is used to remove p-type semiconductor outside gate region, then device structure precision is improved, but process complexity and difficulty increase

Engineering Contradiction:
Improvegate region precisionVSAvoidetching process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

By inverting the polarity from Ga-face to N-face, the patent eliminates the need for complex selective etching processes. The N-face p-type GaN layer's inherent etching resistance allows for simpler, more robust manufacturing processes while maintaining precise gate region definition. This reduces process complexity significantly.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The N-face p-type GaN layer provides self-protection against overetching through its inherent etching resistance. This self-service characteristic eliminates the need for complex process controls and monitoring systems, simplifying the manufacturing process while maintaining high precision in the gate region structure.

Inventive Principle:
Principle #25Self-service

3Reliability

If p-type semiconductor material is used in gate region, then carrier concentration is reduced for enhancement-mode operation, but current collapse effect increases due to etching defects

Engineering Contradiction:
Improvedevice reliabilityVSAvoidcurrent collapse effect
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The polarity inversion to N-face fundamentally eliminates the etching-induced defects that cause current collapse. The N-face orientation's inherent etching resistance prevents the formation of defects during selective etching, thereby maintaining high device reliability while achieving enhancement-mode operation through p-type doping in the gate region.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent converts the potential harm of using p-type material (which requires selective etching that causes defects) into a benefit by using N-face orientation. The etching resistance of N-face becomes a protective feature that prevents defect formation, transforming what was originally a harmful process requirement into a beneficial characteristic that eliminates current collapse.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the stability and reliability of the semiconductor device by simplifying the etching process and achieving a high-quality Schottky gate, while allowing for high doping concentration on the N-face p-type GaN surface, improving ohmic contact and reducing current collapse effects.

Implementation Method 1

doping a polarity reversal element in the p-type Ga-face GaN-based material to reverse the p-type Ga-face GaN-based material to the p-type GaN-based semiconductor layer with N-face as an upper surface

Methodology Applied
Scientific EffectPolarity reversal:

Data Source

PatentUS12080786B2Semiconductor structure comprising p-type N-face GAN-based semiconductor layer and manufacturing method for the same
Publication Date: 2024.09.03 ENKRIS SEMICON
  • US12080786B2 patent drawing
  • US12080786B2 patent drawing
  • US12080786B2 patent drawing

AI summary

Embodiments of the present application disclose a semiconductor structure and a manufacturing method for the semiconductor structure, which solve problems of complicated manufacturing process and poor stability and reliability of existing semiconductor structures. The semiconductor structure includes: a substrate; a channel layer, a barrier layer and a semiconductor layer sequentially superimposed on the substrate, wherein the semiconductor layer is made of a GaN-based material and an upper surface of the semiconductor layer is Ga-face; and a p-type GaN-based semiconductor layer, with N-face as an upper surface, formed in a gate region of the semiconductor layer.