Widened N-Metal Gate Contact Section for CMOS Threshold Voltage Stability
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Solution Overview
Problem
In integrated circuit fabrication, particularly in CMOS technology, the shrinking technology nodes make it challenging to achieve a stable threshold voltage due to atomic diffusion between adjacent metal gates, leading to device instability and potential failure.
Innovation Solution
A CMOS semiconductor device design featuring P- and N-metal gate electrodes with a contact section in the isolation region, where the contact section has a wider width than the main gate electrode, effectively reducing atomic diffusion and maintaining the work function of the P-metal gate electrode, thereby stabilizing the threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal gate electrodes are used to improve device performance at decreased feature sizes, then device performance is improved, but atomic diffusion between adjacent gates causes threshold voltage shifts and device instability
Solution Approach 1:
The patent introduces an intermediary dielectric material between adjacent metal gate electrodes to prevent atomic diffusion. This dielectric layer acts as a barrier that blocks the harmful diffusion of metal atoms between neighboring gates, thereby stabilizing threshold voltage while allowing the beneficial use of metal gate electrodes for improved device performance at scaled dimensions.
2Productivity
If gate length and spacing between devices are decreased to improve integration density, then productivity is improved, but atomic diffusion between adjacent gates increases causing threshold voltage shifts
Solution Approach 1:
The dielectric material serves as a mediator that enables closer spacing between devices by providing effective diffusion barriers. This allows the patent to achieve higher integration density with reduced gate spacing while maintaining threshold voltage stability through the protective dielectric layers that prevent atomic diffusion even at reduced dimensions.
3Ease of manufacture
If a standard uniform gate structure is used to simplify manufacturing, then ease of manufacture is improved, but it is difficult to achieve stable threshold voltage for all CMOS semiconductor devices due to atomic diffusion
Solution Approach 1:
The patent applies local quality by introducing dielectric materials specifically at critical interfaces between metal gates and semiconductor regions, rather than uniformly throughout the entire structure. This targeted approach provides diffusion protection where it is most needed while maintaining manufacturing simplicity and compatibility with existing CMOS fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances device performance by maintaining a stable threshold voltage and reducing the likelihood of device failure, even as feature sizes decrease, by preventing atomic diffusion and ensuring consistent work function across the metal gate structure.
Implementation Method 1
atomic diffusion between adjacent gates causes shifts in the threshold voltage of CMOS semiconductor devices
Data Source
AI summary
The invention relates to integrated circuit fabrication, and more particularly to a metal gate structure. An exemplary structure for a CMOS semiconductor device comprises a substrate comprising a P-active region, an N-active region, and an isolation region interposed between the P- and N-active regions; a P-metal gate electrode over the P-active region, that extends over the isolation region; and an N-metal gate electrode having a first width over the N-active region, that extends over the isolation region and has a contact section in the isolation region electrically contacting the P-metal gate electrode, wherein the contact section has a second width greater than the first width.