Network-Accessible Memory Caching via Intermediary Logic
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Solution Overview
Problem
Network storage systems face issues with access latency, limited memory addressability, and challenges in sharing state between failover partners and acquiring snapshots due to latency and synchronization problems.
Innovation Solution
A network-accessible memory (NAM) system comprising a substrate with mounted RAM, network interface circuitry, and logic circuitry, which operates as a memory controller to control access to the RAM via a network interface, providing a cost-effective solution for caching, SAN acceleration, and improved state sharing in cluster-failover configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If caching is used to reduce access latency, then access speed is improved, but device complexity and cost increase
Solution Approach 1:
The patent introduces a network-accessible memory device as an intermediary component between the storage server and mass storage devices. This mediator provides caching functionality by intercepting read requests, checking for cached data in its memory, and serving data directly from cache when available, thereby reducing access latency without significantly complicating the existing storage architecture.
Solution Approach 2:
The network-accessible memory device uses volatile memory (such as DRAM) that is relatively inexpensive per gigabyte compared to persistent storage. While the memory is volatile and requires continuous power, its low cost and high speed make it an economical choice for caching frequently accessed data, accepting the trade-off of data loss on power failure in exchange for performance improvement.
2Quantity of substance
If larger cache capacity is provided, then more data can be cached, but cost increases
Solution Approach 1:
The patent changes the capacity parameter of the network-accessible memory device to match the size of the mass storage devices it caches, rather than using traditional small cache sizes. This parameter change enables caching of entire disk images or large volumes of data, significantly increasing cache capacity. The cost is managed by using cost-effective DRAM technology and scaling capacity according to specific caching needs rather than providing universal large capacity.
3Loss of time
If network-accessible memory is used, then access latency is reduced, but memory addressability limitations remain
Solution Approach 1:
The patent segments the storage system into distinct components: the network-accessible memory device handling caching operations independently, and the mass storage devices handling persistent storage. This segmentation allows the memory device to operate with its own address space and memory management, avoiding the addressability limitations of the host system while still providing transparent caching services through network protocols.
4Reliability
If state sharing between failover partners is implemented, then reliability is improved, but synchronization latency increases
Solution Approach 1:
The network-accessible memory device creates and maintains copies of data for failover partners. When one partner fails, the other can immediately access the cached copy from the memory device without waiting for synchronization over the network. This copying approach provides immediate failover capability while minimizing synchronization latency, as the memory device can serve multiple partners simultaneously with low-latency memory access.
Data Source
AI summary
A network-accessible memory (NAM) element comprises a substrate, a memory mounted to the substrate, network interface circuitry and logic circuitry. The network interface circuitry implements a network physical layer and is mounted to the substrate. The logic circuitry is mounted to the substrate and is coupled to the network interface circuitry and the memory, and is configured to operate as a memory controller to control access to the memory by a host processor which is external to the NAM element through the network interface circuitry. The NAM element can be interconnected with other NAM elements to form a larger NAM storage device.