Namespace Reference Table Switching for Low-Latency Address Translation
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Solution Overview
Problem
The existing memory sub-systems face performance issues and latency problems due to the need to pause I/O operations for updating namespace reference tables, which are stored in limited and expensive local memory, leading to inefficiencies in address translation.
Innovation Solution
Implementing a dual metadata structure approach, where a primary metadata structure is stored on local memory and a secondary structure is stored on volatile memory, allowing for seamless updates without pausing I/O operations, thus optimizing namespace address translations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If namespace reference tables are stored in local memory, then address translation speed is improved, but memory overhead and cost increase
Solution Approach 1:
The namespace reference table is segmented into two copies: a first copy stored in local memory for fast access during normal operations, and a second copy stored in volatile memory for updates. This segmentation allows the system to maintain fast address translation while reducing the burden on limited local memory resources.
Solution Approach 2:
The patent introduces an intermediary mechanism where the volatile memory serves as a buffer for namespace reference table updates. The volatile memory acts as a mediator that receives update instructions from the host system and applies them without requiring I/O operations to pause, thus decoupling the fast local memory from update operations.
2Manufacturing precision
If namespace reference tables are updated in local memory, then address translation accuracy is improved, but I/O operations must be paused causing latency
Solution Approach 1:
The system performs preliminary actions by maintaining a ready-to-use copy of the namespace reference table in local memory before updates are needed. When update instructions arrive, the volatile memory copy is updated while the local memory copy remains unchanged and continues to serve I/O operations, eliminating the need to pause I/O for updates.
Solution Approach 2:
The patent ensures continuity of useful action by allowing I/O operations to continue uninterrupted while namespace reference table updates occur in parallel in the volatile memory. The system switches between copies seamlessly, maintaining continuous address translation service without latency interruptions.
3Device complexity
If a single namespace reference table is used, then device complexity is reduced, but update operations cause I/O pauses
Solution Approach 1:
The patent implements a dynamic metadata structure where two copies of the namespace reference table coexist in different memory types. The system dynamically switches between using the local memory copy for fast access and the volatile memory copy for updates, adapting to operational needs without requiring I/O pauses and maintaining high productivity.
Data Source
AI summary
A method includes storing, by a processing device of a memory sub-system controller, on a first memory device, a first address translation metadata structure. An instruction reflecting a namespace change associated with a zoned namespace is received and the first address translation metadata structure is updated based on the instruction. An address translation metadata pointer to reference the first address translation metadata structure during address translation operations associated with the plurality of zoned namespaces is updated and the first address translation metadata structure is copied into a second memory device, thus creating a second address translation metadata structure. The hardware register is updated to point to the second address translation metadata structure during address translation operations associated with the plurality of zoned namespaces.