NAND Memory Address Feature Tables for Adaptive Read/Write Control
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Solution Overview
Problem
Existing NAND flash memory systems do not consider the unique features of individual addresses when performing read and write operations, leading to suboptimal performance.
Innovation Solution
A memory system that includes a non-volatile memory with a register storing feature information tables, allowing the controller to adjust read and write operations based on the specific features of each address, using optimal settings for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a memory controller executes read/write operations without considering address features, then the operation process is simple and fast, but the reading and writing accuracy deteriorates
Solution Approach 1:
The patent applies preliminary action by having the non-volatile memory store feature information tables in advance, which map address features to optimal operation settings. When a read or write operation is requested, the controller retrieves the pre-stored feature information for the target address and selects the corresponding optimal settings, eliminating the need for complex real-time analysis while achieving high accuracy.
Solution Approach 2:
The patent introduces feature information tables as an intermediary between the memory controller and the memory cell array. These tables mediate the relationship by storing pre-analyzed address features and their corresponding optimal operation parameters, allowing the controller to make informed decisions about read/write operations without directly analyzing each address feature in real-time.
2Measurement precision
If feature information tables are stored in non-volatile memory, then optimal operation settings can be applied to improve accuracy, but the device complexity increases
Solution Approach 1:
The patent merges the feature information storage function with the existing non-volatile memory structure. By integrating the feature information tables into the memory device itself rather than adding a separate external storage component, the patent combines multiple functions (data storage and feature information storage) into a single unified structure, thereby improving accuracy without proportionally increasing device complexity.
3Measurement precision
If the memory controller stores and references feature information tables, then read and write operations become more accurate, but the processing time increases
Solution Approach 1:
The patent applies preliminary action by pre-storing feature information tables in the non-volatile memory before operations are needed. This allows the memory controller to quickly retrieve optimal operation settings for any address without performing complex analysis during the actual read/write operation, thereby minimizing processing time while maintaining high accuracy.
Data Source
AI summary
A memory system includes a non-volatile memory and a controller. The non-volatile memory includes a memory cell array and a register storing first table data including feature information indicating feature of an address designating a storage area in the memory cell array. The controller can control the non-volatile memory. When receiving address information indicating the address from the controller, the non-volatile memory reads the feature information from the first table data in the register and transmits the feature information to the controller. When receiving the feature information from the non-volatile memory, the controller can execute a response operation in response to a request with respect to the address based on the received feature information.