NAND Aging Protection via Alternating PMOS Park Status
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Solution Overview
Problem
Three-dimensional (3D) NAND memory structures experience uneven aging due to negative bias temperature instability (nBTI) and hot carrier impact, leading to duty cycle degradation and performance issues, especially at higher I/O speeds, as only alternate PMOS devices are stressed, causing asymmetric threshold voltage degradation.
Innovation Solution
An aging protection scheme that alternates the park status of PMOS devices after every data input/output burst operation, ensuring even stress on both even and odd node devices, thereby maintaining symmetric PMOS usage and preventing duty cycle deterioration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If only alternate PMOS devices are stressed during normal operation, then the operation is simple, but asymmetric threshold voltage degradation occurs leading to duty cycle deterioration
Solution Approach 1:
The patent implements periodic action by alternating the park status of PMOS devices after every burst cycle operation. The controller switches between parking even node devices and odd node devices in a periodic manner, ensuring that all PMOS devices experience uniform stress distribution over time. This periodic alternation prevents asymmetric degradation and maintains duty cycle stability while preserving operational simplicity.
2Productivity
If higher I/O speeds are implemented, then productivity increases, but nBTI impact on performance becomes more significant
Solution Approach 1:
The patent applies preliminary anti-action by proactively alternating the park status of PMOS devices before significant asymmetric degradation can occur. This preventive measure counteracts the nBTI effect that becomes more severe at higher I/O speeds, ensuring performance stability is maintained even as productivity increases through higher speed operation.
3Quantity of substance
If the number of tiers or word lines is increased to achieve higher density, then storage capacity improves, but the number of contacts increases leading to more aging
Solution Approach 1:
The patent applies local quality by targeting specific local groups (even node devices vs. odd node devices) for differentiated parking status assignment. This localized differentiation ensures that aging stress is distributed evenly across all PMOS devices in the increased number of tiers, preventing any single region from experiencing excessive cumulative stress while maintaining the higher storage capacity enabled by additional tiers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach guarantees reliable NAND performance at both initial and end-of-life cycles, enhances yield, and reduces costs by ensuring uniform degradation of all PMOS devices, maintaining output duty cycle similarity to input duty cycle, and improving performance at higher I/O speeds.
Implementation Method 1
Three-dimensional (3D) NAND memory structures experience uneven aging due to negative bias temperature instability (nBTI) and hot carrier impact
Implementation Method 2
Three-dimensional (3D) NAND memory structures experience uneven aging due to negative bias temperature instability (nBTI) and hot carrier impact
Data Source
AI summary
Systems, apparatuses, and methods may provide for technology for an aging protection scheme for memory structures. For example, such technology determines a completion of a burst cycle operation. Such technology alternates between a first park status applied to even node devices and a second park status applied to odd node devices in response to the determined completion of the burst cycle operation.