NAND Memory with Amorphous Silicon RRAM Cells
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Solution Overview
Problem
Resistive random-access memory (RRAM) devices based on amorphous silicon (a-Si) structures face challenges in endurance due to excessive bias voltage during write and erase cycles, leading to shortened lifespan and yield issues related to the electroforming process, which affects the formation of conductive filaments and ion movements.
Innovation Solution
A NAND memory architecture incorporating resistive memory cells with a switching medium of amorphous silicon, where the resistance is controlled by applying electrical signals to form and retrieve conductive filaments, utilizing silver as the filament-forming ion source and a boron-doped polysilicon bottom electrode to manage defect site formation and retention time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If excessive bias voltage is applied during write and erase cycles, then the resistance switching speed is improved, but the endurance of the resistive device is shortened
Solution Approach 1:
The patent changes the material parameter of the switching medium from conventional metal oxide to amorphous silicon, which fundamentally alters the resistance switching mechanism. This material parameter change enables the device to achieve fast switching speeds without requiring excessive bias voltage, thereby resolving the contradiction between speed and endurance by selecting a material with inherently superior electrical characteristics for the specific application
2Manufacturing precision
If a larger voltage signal is applied during the electroforming process, then the conducting path formation is improved, but the device yield is affected
Solution Approach 1:
The patent changes the material composition parameter from metal oxide to amorphous silicon, which fundamentally alters the electroforming characteristics. Amorphous silicon enables conducting path formation at lower voltages compared to metal oxide materials, thereby achieving reliable conducting path formation without the need for excessively large voltage signals that would damage devices and reduce yield
3Productivity
If repeated write and erase cycles are performed, then the memory functionality is maintained, but Joule heating and ion movements shorten the device life
Solution Approach 1:
The patent changes the thermal and electrical parameters of the switching medium by using amorphous silicon instead of metal oxide. This material parameter change results in lower resistive heating during operation and reduced ion migration activity, enabling the device to withstand repeated write and erase cycles without significant degradation, thus maintaining memory functionality while extending device life
Solution Approach 2:
The patent substitutes the metal oxide-based resistance switching mechanism with an amorphous silicon-based mechanism, which operates through different physical principles. This substitution eliminates the harmful Joule heating and excessive ion movements characteristic of metal oxide devices, allowing repeated memory cycles to be performed without shortening device life
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the endurance and retention time of RRAM devices by controlling filament formation and ion movements, allowing for predictable and prolonged resistance switching without the need for high voltage, thus improving the overall performance and reliability of RRAM devices.
Implementation Method 1
The resistance switching has been explained by the formation of conductive filaments inside the insulator due to Joule heating and electrochemical processes in binary oxides
Implementation Method 2
The resistance switching has been explained by the formation of conductive filaments inside the insulator due to Joule heating and electrochemical processes in binary oxides
Implementation Method 3
In the case of a-Si structures, electric field-induced diffusion of metal ions into the silicon leads to the formation of conductive filaments that reduce the resistance of the a-Si structure
Implementation Method 4
electric field-induced diffusion of metal ions into the silicon leads to the formation of conductive filaments
Implementation Method 5
These filaments remain after a biasing (or program) voltage is removed, thereby giving the device its non-volatile characteristic
Implementation Method 6
the filaments can be removed by reversing the flow of the ions back toward the metal electrode under the motive force of a reverse polarity applied voltage
Data Source
AI summary
A non-volatile memory device includes a first select transistor, a second select transistor, and a first string of first memory cells provided between the first and second select transistors. Each first memory cell has a first resistive memory cell and a first transistor. The first resistive memory cell is in series with a gate of the first transistor. The non-volatile memory device further includes a first bit line coupled to a drain of the first select transistor and a plurality of word lines. Each word line is coupled to one of the first memory cells.


