3D NAND Memory Array Strings With Replacement-Gate Block Isolation
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Solution Overview
Problem
Current memory array technologies face challenges in efficiently forming vertically-stacked memory cells with precise control over conductive and insulative tiers, leading to suboptimal electrical access and isolation between memory blocks, which affects the reliability and performance of memory arrays.
Innovation Solution
A method involving a 'gate-last' or 'replacement-gate' process is employed, where a conductor tier is formed with alternating insulative and conductive tiers, channel openings are created, and trench formation allows for the deposition and etching of materials to establish channel-material strings and intervening insulation, ensuring precise electrical coupling and isolation between memory blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional memory array architectures are used to form vertically-stacked memory cells, then manufacturing processes are simpler, but structural integrity and electrical connectivity are compromised
Solution Approach 1:
The patent applies preliminary action by forming the conductor tier and alternating insulative/conductive tiers before forming channel openings and integrating channel material strings. This sequence ensures that the conductive pathways are established in advance, guaranteeing reliable electrical connectivity while maintaining a structured manufacturing approach that manages complexity.
Solution Approach 2:
The memory array is segmented into vertically-stacked memory cells with distinct functional layers: conductor tier, alternating insulative/conductive tiers, and channel material strings. This segmentation allows each layer to be optimized independently for its specific function (electrical conduction, insulation, or channel formation), thereby improving overall structural integrity and electrical connectivity without requiring monolithic complex processing.
2Reliability
If vertically-stacked memory cells are formed with alternating insulative and conductive tiers, then electrical connectivity is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent implements local quality by using different materials with distinct etch selectivities for insulative versus conductive tiers. This allows the formation process to be highly selective for each tier type, ensuring precise layer-by-layer construction. The isotropic etching process exploits these local material differences to achieve the required manufacturing precision for forming void-spaces and integrating channel material strings without compromising electrical connectivity.
Solution Approach 2:
The patent changes material parameters (etch selectivity, conductivity, insulation properties) for different tiers to facilitate their formation. By selecting materials with contrasting etch characteristics, the manufacturing process can precisely control the formation of each tier, maintaining electrical connectivity while managing precision requirements through material property optimization rather than purely geometric control.
3Reliability
If channel material strings are integrated with conductive material through isotropic etching, then electrical connections are enhanced, but material loss increases
Solution Approach 1:
The patent uses the insulative tier material as an intermediary during the isotropic etching process. The etchant selectively removes the insulative material to create void-spaces while leaving the conductive material intact. This intermediary approach allows the channel material strings to be integrated with conductive material for enhanced electrical connections without direct material loss, as the etching is mediated through the sacrificial insulative layer rather than attacking the conductive material directly.
Solution Approach 2:
The insulative tier material serves as a disposable sacrificial layer that is temporarily present during manufacturing to enable precise formation of conductive pathways. This cheap, short-living material is selectively removed through isotropic etching to create the desired electrical connections, while the expensive conductive material is preserved. The temporary insulative structure facilitates the connection process without being retained in the final device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of reliable memory arrays with improved electrical access and isolation, enhancing the performance and reliability of vertically-stacked memory cells, particularly in NAND architecture.
Implementation Method 1
The first-tier material is isotropically etched selectively relative to the second-tier material to form void-space in the first tiers
Implementation Method 2
Conducting material is deposited into the trenches and into the void-space in the first tiers
Data Source
AI summary
A method used in forming a memory array comprising strings of memory cells comprises forming a conductor tier comprising conductor material on a substrate. A stack is formed comprising vertically-alternating first tiers and second tiers above the conductor tier. The stack comprises laterally-spaced memory-block regions having horizontally-elongated trenches there-between. Channel-material strings extend through the first tiers and the second tiers. Material of the first tiers is of different composition from that of the second tiers. A lowest of the first tiers is thicker than the first tiers there-above. The first-tier material is isotropically etched selectively relative to the second-tier material to form void-space in the first tiers. Conducting material is deposited into the trenches and into the void-space in the first tiers. The conducting material fills the void-space in the first tiers that are above the lowest first tier. The conducting material less-than-fills the void-space in the lowest first tier. The conducting material is etched from the lowest first tier. After the etching of the conducting material, conductive material is deposited into the void-space of the lowest first tier and that directly electrically couples together the channel material of individual of the channel-material strings and the conductor material of the conductor tier. Additional embodiments, including structure independent of method, are disclosed.