NAND Memory Bit Inversion for Lower- and Upper-Page Error Control

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Solution Overview

Problem

Existing nonvolatile memory systems, such as NAND-type SSDs, face challenges in reducing supplementary information while maintaining data integrity and writing efficiency, leading to decreased storage capacity and increased bit error rates due to the need for additional encoding data.

Innovation Solution

A memory system and controller that generate coded data based on write data and error correction codes, determining whether to invert bits based on population biases in the data, reducing the need for supplementary information by optimizing bit distributions across memory pages, and employing error correction decoding processes to handle decoding failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If encoding technology is applied to reduce memory cell exhaustion, then memory cell endurance is improved, but the amount of supplementary information increases, reducing user data capacity

Engineering Contradiction:

Improvememory cell enduranceVSAvoiduser data capacity

Core Design Contradiction:

Duration of action of stationary objectVSQuantity of substance

Solution Approach 1:

The patent inverts bits of coded data based on population bias before writing to memory. By inverting data patterns to achieve balanced 0/1 distribution, the system reduces supplementary information requirements while maintaining encoding benefits for memory cell endurance protection.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent changes the bit distribution parameter of the data by applying inversion operations. This transforms the data from having population bias to having balanced 0/1 distribution, thereby reducing the amount of supplementary information needed while preserving error correction capabilities.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If supplementary information is added for encoding, then data integrity is improved, but the amount of user data that can be written decreases

Engineering Contradiction:

Improvedata integrityVSAvoiduser data capacity

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies bit inversion to coded data based on population bias analysis. This inversion reduces the supplementary information overhead while maintaining the error detection and correction capabilities that ensure data integrity during read operations.

Inventive Principle:

Principle #13The other way round (Inversion)

3Quantity of substance

If bit inversion is applied based on population bias, then supplementary information is reduced, but decoding complexity increases

Engineering Contradiction:

Improvesupplementary informationVSAvoiddecoding complexity

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent performs bit inversion as a preliminary action before writing data to memory. By pre-processing the data to achieve balanced distribution and reducing supplementary information requirements upfront, the actual read and decode operations become simpler and faster, as the inversion state can be determined from the population bias of the stored data.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS10529417B2Storage device that inverts bits of data written into a nonvolatile memory thereof

Publication Date: 2020.01.07 KIOXIA CORP

AI summary

A storage device includes a nonvolatile memory and a controller. The controller is configured to generate coded data based on write data and an error correction code generated from the write data, determine whether or not to invert each bit of the coded data, based on a logical page position of the nonvolatile memory in which the write data are to be written and a value “0” or “1” of bits that are more populated in the coded data than bits having the other value of “1” and “0”, invert each bit of the coded data upon determining to invert, and write the non-inverted or inverted coded data into the logical page position of the nonvolatile memory. The logical page position is one of logical page positions including a lower page and an upper page.