3D NAND Channel Nitrogen Doping for Better Charge Transport
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Solution Overview
Problem
Existing NAND memory architectures and transistor designs face challenges in improving conductivity and efficiency, particularly in three-dimensional configurations, where conventional materials and structures do not adequately enhance charge transport.
Innovation Solution
Incorporating nitrogen into the semiconductor channel material, either as silicon nitride along the interior surface or diffused within the channel material, enhances conductivity by modifying grain boundaries and improving charge flow in NAND memory arrays and flash transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional materials and structures are used in three-dimensional NAND memory configurations, then manufacturing simplicity is maintained, but conductivity and charge transport efficiency are insufficient
Solution Approach 1:
The patent applies local quality by introducing nitrogen specifically at the grain boundaries of the semiconductor channel material rather than uniformly throughout. This localized modification targets the specific regions where charge transport occurs, improving conductivity where needed while maintaining the overall simplicity of the three-dimensional NAND structure. The nitrogen is incorporated through controlled thermal processing that selectively affects grain boundary regions.
Solution Approach 2:
The patent changes the chemical composition parameter of the semiconductor channel material by incorporating nitrogen. This parameter change modifies the electrical properties of the material, specifically enhancing conductivity through the formation of silicon nitride phases at grain boundaries. The nitrogen concentration and distribution are controlled through thermal processing parameters to achieve optimal conductivity improvement.
2Reliability
If nitrogen is incorporated into semiconductor channel material to improve conductivity, then charge flow efficiency increases, but manufacturing process complexity increases
Solution Approach 1:
The patent applies preliminary action by incorporating nitrogen into the semiconductor channel material during the formation process itself, before the completion of subsequent manufacturing steps. The nitrogen is introduced and distributed throughout the channel material in advance, so that when the device is operated, the conductivity enhancement is already present. This eliminates the need for separate post-fabrication nitrogen treatment steps.
Solution Approach 2:
The patent applies self-service by using the existing thermal processing steps already required for NAND memory fabrication to simultaneously achieve nitrogen incorporation and grain boundary modification. The thermal budget already allocated for other process steps is utilized to drive nitrogen diffusion and silicon nitride formation, so no additional energy input or separate processing equipment is required. The manufacturing process serves multiple functions through its existing thermal cycles.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The introduction of nitrogen increases the conductivity of the channel material, leading to improved charge flow and operational efficiency in NAND memory arrays and flash transistors, facilitating better read and write operations.
Implementation Method 1
diffusion of nitrogen into semiconductor channel material, and/or formation of silicon nitride directly against the channel material, can improve conductivity of the channel material
Data Source
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AI summary
Some embodiments include device having a gate spaced from semiconductor channel material by a dielectric region, and having nitrogen-containing material directly against the semiconductor channel material and on an opposing side of the semiconductor channel material from the dielectric region. Some embodiments include a device having a gate spaced from semiconductor channel material by a dielectric region, and having nitrogen within at least some of the semiconductor channel material. Some embodiments include a NAND memory array which includes a vertical stack of alternating insulative levels and wordline levels. Channel material extends vertically along the stack. Charge-storage material is between the channel material and the wordline levels. Dielectric material is between the channel material and the charge-storage material. Nitrogen is within the channel material. Some embodiments include methods of forming NAND memory arrays.