3D NAND Cell Structure With Segmented Charge Trap Layers
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Solution Overview
Problem
Current 3D-NAND devices with continuous charge trap layers face issues of cell-to-cell interference and lateral charge spreading, hindering scale-down of word line to word line insulators, due to the use of trap-cut structures that are problematic for gate area utilization and shape/thickness variation.
Innovation Solution
A discontinuous charge trap layer is implemented between tunnel oxide and word lines using atomic layer deposition of silicon nitride, with a trap-cut structure that avoids cell-to-cell interference and lateral charge spreading, and is fabricated using a method involving memory hole formation, recessing, and selective removal of sacrificial layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a continuous charge trap layer is used, then the device structure is simple and manufacturing is easier, but cell-to-cell interference and lateral charge spreading occur which hinder scale-down
Solution Approach 1:
The charge trap layer is segmented into discrete regions using trap-cut structures that divide the continuous layer into cell-specific segments. This segmentation prevents charge spreading between adjacent cells while maintaining the charge trap functionality within each cell region.
Solution Approach 2:
The charge trap layer exhibits different properties in different locations: it is present and continuous in the channel region for charge storage, but removed or cut in the source/drain regions to prevent lateral charge spreading and interference between adjacent cells.
2Reliability
If a trap-cut structure is used to eliminate charge trap layer under source and drain, then cell-to-cell interference is reduced, but gate area utilization decreases and shape/thickness variation occurs
Solution Approach 1:
Instead of completely removing the charge trap layer under source and drain regions, the patent uses partial removal or selective thinning approaches. This partial action maintains sufficient charge trap coverage for reliability while reducing lateral charge spreading, thereby preserving more gate area compared to full trap-cut structures.
3Reliability
If a trap-cut structure is used, then lateral charge spreading is suppressed, but shape and thickness variation in the trap layer occurs due to deposition and removal processes
Solution Approach 1:
The patent introduces intermediary layers or sacrificial materials between the charge trap layer and source/drain regions. These intermediaries enable controlled charge confinement without requiring direct trap-cutting, thereby maintaining more uniform trap layer shape and thickness while still preventing lateral charge spreading.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables improved scalability and reduced interference in 3D-NAND devices by confining the charge trap layer, enhancing carrier mobility and string current, thus improving differentiation between ON and OFF cells.
Implementation Method 1
each of the plurality of memory cells comprising a discrete blocking oxide layer, a charge trap layer, and a tunnel oxide layer
Implementation Method 2
the blocking oxide layer is discrete between each of the plurality of memory cells
Data Source
AI summary
Described is a memory device including a plurality of memory cells formed around a memory hole extending through a memory stack on a substrate. Each of the plurality of memory cells comprises a discrete blocking oxide layer, a charge trap layer, and a tunnel oxide layer. The blocking oxide layer is discrete between each of the plurality of memory cells. The tunnel oxide layer is continuous between each of the plurality of memory cells, and the charge trap layer is discrete between each of the plurality of memory cells. The charge trap layer has a first thickness on a top portion and a second thickness on a center portion, the first thickness different than the second thickness.


