Narrowing Threshold Voltage Distribution in 3D NAND via Checkpoint Reprogramming
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Solution Overview
Problem
Charge-trapping memory cells in 3D NAND stacked memory devices experience significant short-term data-retention loss due to charge detrapping from shallow traps in tunnel ONO layers, leading to a downshift and broadening of threshold voltage distributions, which affects data retention and programming accuracy.
Innovation Solution
Implementing an initial number of program-verify iterations with a temporary lockout state for memory cells that reach a verify level quickly, followed by a checkpoint program-verify iteration for all memory cells, and subsequent reprogramming of cells that fail to maintain the same verify level, thereby reducing detrapping effects without increasing programming time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional programming methods are used for charge-trapping memory cells, then programming speed is maintained, but threshold voltage distribution broadens and data retention deteriorates due to charge detrapping
Solution Approach 1:
The programming process is divided into multiple passes with distinct functions: initial programming pass, intermediate verification pass, and final programming pass. Each pass targets specific subsets of memory cells based on their programming status and detrapping characteristics, allowing precise control over threshold voltage distribution while maintaining overall programming efficiency
Solution Approach 2:
An intermediate verification pass is performed before final programming to identify memory cells that have experienced significant detrapping. This preliminary identification allows the system to apply targeted reprogramming only to affected cells, preventing threshold voltage distribution broadening while maintaining data retention reliability
2Manufacturing precision
If programming time is extended to reduce detrapping effects, then threshold voltage distribution tightens, but programming productivity decreases
Solution Approach 1:
Instead of uniformly reprogramming all memory cells, the method applies reprogramming only to the subset of cells identified as having experienced significant detrapping during the intermediate verification pass. This partial action approach tightens threshold voltage distribution for affected cells without unnecessarily extending programming time for cells that are already properly programmed
Solution Approach 2:
The intermediate verification pass provides feedback information about the actual programming status and detrapping程度 of memory cells. This feedback enables the system to dynamically adjust the final programming parameters and target specific cells, achieving tight threshold voltage distribution with minimal additional programming time
3Reliability
If multiple programming passes are implemented to address detrapping, then data retention improves, but programming complexity increases
Solution Approach 1:
The programming process is segmented into distinct passes with clearly defined objectives and criteria for advancing to the next pass. The first pass programs all cells, the intermediate pass verifies and identifies detrapped cells, and the final pass reprograms only affected cells. This segmentation provides a systematic framework that manages complexity through structured progression
Solution Approach 2:
Different programming parameters are applied in different passes: initial programming uses standard parameters, intermediate verification uses read parameters to detect threshold voltage shifts, and final reprogramming uses adjusted parameters optimized for correcting detrapped cells. This parameter variation approach improves data retention while keeping the control logic relatively simple
Data Source
AI summary
Techniques are provided for programming memory cells while reducing the effects of detrapping which cause a downshift in the threshold voltage distribution. Detrapping is particularly problematic for charge-trapping memory cells such as in a 3D stacked non-volatile memory device. During programming, a temporary lockout mode is provided for memory cells which pass a verify test. During a checkpoint program-verify iteration, all memory cells of a target data state are subject to the verify test. The memory cells in the temporary lockout mode are therefore subject to the verify test a second time. Memory cells that fail the verify test in the checkpoint program-verify iteration are programmed further. A normal or slow programming mode is used for a memory cell depending on whether it had reached the temporary lockout mode. Threshold voltage distributions are narrowed by reprogramming some of the memory cells.