NAND Flash Controller Health Buffer for Error Monitoring

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Solution Overview

Problem

NAND flash memory devices experience degradation due to user usage and environmental factors, leading to increased error bits in read data, which complicates data recovery and reduces the reliability of storage devices.

Innovation Solution

A method and system for improving data reliability in non-volatile memory devices, including a controller and storage device that performs multiple read operations, uses a health buffer to store wordline information, and implements error correction circuits to manage and correct errors, while also employing health check units for monitoring memory cell health and performing reclaim operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple read operations are performed to improve data reliability, then data reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidoperation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs health check operations and monitors error bits in advance before data recovery becomes critical. By conducting preliminary read operations to assess memory cell health and storing wordline information in a health buffer when error rates exceed thresholds, the system prepares for potential recovery operations ahead of time, reducing the complexity of emergency data recovery while improving overall reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the controller continuously monitors error bits from read operations and uses this information to determine whether to store wordline information in the health buffer. This feedback loop allows the system to adapt its behavior based on real-time health status, improving data reliability through targeted operations rather than blind multiple reads, thus managing complexity effectively

Inventive Principle:
Principle #23Feedback

2Reliability

If health monitoring operations are performed continuously, then data reliability is improved, but loss of time increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidmonitoring time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs health check operations periodically rather than continuously. The controller executes read operations at scheduled intervals to monitor error bit rates and assess memory cell health. This periodic approach maintains data reliability through regular health assessments while minimizing the time consumed by monitoring, as operations are conducted only at necessary intervals rather than continuously

Inventive Principle:
Principle #19Periodic action

3Reliability

If error correction operations are performed frequently, then data reliability is improved, but productivity decreases

Engineering Contradiction:
Improvedata reliabilityVSAvoiddata access speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements self-service error monitoring where the memory device automatically monitors its own health status through read operations and error bit analysis. The controller independently determines when health degradation occurs and initiates appropriate operations without requiring external intervention. This self-service mechanism improves reliability through continuous self-assessment while minimizing productivity impact by avoiding unnecessary error correction operations and only acting when health thresholds are breached

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11735278B2Non-volatile memory device, controller for controlling the same, storage device having the same, and method of operating the same
Publication Date: 2023.08.22 SAMSUNG ELECTRONICS CO LTD
  • US11735278B2 patent drawing
  • US11735278B2 patent drawing
  • US11735278B2 patent drawing

AI summary

A method of operating a controller includes randomly transmitting a first command to a non-volatile memory device upon a read request from a host; receiving first read data corresponding to the first command from the non-volatile memory device; determining whether the number of first error bits of the first read data is greater than a first reference value; determining whether the number of first error bits is greater than a second reference value, when the number of first error bits is not greater than the first reference value; storing a target wordline in a health buffer, when the number of first error bits is greater than the second reference value; periodically transmitting a second command to the non-volatile memory device; and receiving second read data corresponding to the second command from the non-volatile memory device.