NAND Flash Controller Power Scaling by Host Access Speed

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Solution Overview

Problem

Existing SSD controllers face inefficiencies in energy consumption and performance due to frequent clock frequency changes or inability to enter low power states, which are not aligned with host demand for access.

Innovation Solution

A NAND flash memory controller with modules to estimate host and controller speeds, make decisions based on their relation or variation, and adjust processing power accordingly to optimize energy usage and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the SSD controller operates at maximum speed with all internal clocks set to highest frequencies, then the maximum operation speed of the SSD is fulfilled, but the controller consumes a lot of energy and generates a lot of heat

Engineering Contradiction:
Improveoperation speedVSAvoidenergy consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the controller speed adjustable based on host demand. The controller estimates host speed and controller speed, then dynamically adjusts the controller's operating speed to match the host's actual access demand, rather than operating continuously at maximum speed. This resolves the contradiction by enabling the controller to operate at high speed when needed and reduce speed (and energy consumption) when the host demand is lower.

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If the SSD controller enters a low power state after a period of time without I/O commands, then energy is saved, but if the period is long the controller cannot enter low power state and if the period is short the controller changes frequency frequently affecting performance

Engineering Contradiction:
Improveenergy savingVSAvoidcontroller performance
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent applies feedback by implementing a speed estimation module that continuously monitors host access patterns and provides feedback to the speed adjustment module. The controller estimates the host's access speed and adjusts its own operating speed accordingly, creating a closed-loop control system. This resolves the contradiction by using real-time feedback to determine when to adjust speed, avoiding both premature low-power transitions and excessive frequency changes.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies parameter changes by dynamically adjusting the controller's operating speed parameter based on estimated host demand. The speed adjustment module changes the controller's clock frequency and operational parameters to match the host's actual access rate, rather than using fixed thresholds for low-power states. This resolves the contradiction by smoothly adapting the speed parameter to host demand without frequent abrupt changes.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If the SSD controller operates at high processing power to meet host demand, then performance is maintained, but energy consumption increases

Engineering Contradiction:
Improveprocessing powerVSAvoidenergy waste
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent applies partial action by having the controller operate at full processing power only when the host actually demands high-speed access. The speed estimation and adjustment mechanism ensures the controller uses exactly the amount of processing power needed, neither more nor less. This resolves the contradiction by avoiding excessive energy consumption while maintaining sufficient performance to meet host demand.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12430033B2NAND flash memory controller capable of adjusting its processing power according to its speed
Publication Date: 2025.09.30 REALTEK SEMICON CORP
  • US12430033B2 patent drawing
  • US12430033B2 patent drawing

AI summary

A NAND flash memory controller can adjust its processing power according to a host speed and thereby save energy. The controller includes: a host speed estimation module estimating the host speed according to a first total data amount of the host's M first I/O command(s) received by the controller within a first period of time, the host speed correlating with the host's demand for access; a controller speed estimation module estimating a controller speed according to a second total data amount of the host's N second I/O command(s) completed by the controller within a second period of time, the controller speed correlating with the processing power of the controller; a speed decision module generating a decision result according to the relation between the host speed and the controller speed; and a speed adjustment module adjusting or maintaining the processing power of the controller according to the decision result.