NAND Controller Read QoS via Buffer Bypass and Program Suspension
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In block-addressable non-volatile memory, read starvation occurs due to program operations, leading to increased read latency and degraded read quality of service (QoS), particularly in QLC NAND devices where read operations are hindered by collisions with ongoing programming sequences and pre-reads, resulting in significant delays and performance issues.
Innovation Solution
A storage device with a controller, command queue, and command logic that allows read operations to bypass collisions by using internal NAND page buffers and enables pre-read bypass operations, suspending program operations to prioritize read commands, thereby reducing read latency and improving QoS.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If QLC NAND technology is used to increase storage density, then cost savings are achieved, but program time increases significantly
Solution Approach 1:
The patent segments the program operation into multiple phases with suspend/resume points, allowing the programming process to be interrupted and restarted. This enables read operations to be performed during suspended periods without waiting for the complete program operation, effectively overlapping read and program timelines.
Solution Approach 2:
The patent performs preliminary actions by suspending the program operation before it completes, allowing read operations to be initiated and completed while the program operation is paused. This preliminary suspension enables reads to proceed without full program completion blocking them.
2Reliability
If program operations are performed on NAND memory, then data is programmed successfully, but read starvation occurs and read latency increases
Solution Approach 1:
The patent dynamically adjusts the timing and state of program operations by introducing suspend and resume commands. The program operation transitions between active and suspended states based on read operation requirements, creating a flexible, dynamic system that adapts to varying read latency needs while maintaining program reliability.
Solution Approach 2:
The patent maintains continuity of useful action by ensuring that read operations can proceed without interruption even when program operations are suspended. The suspended program operation remains in a valid state and can be resumed later, ensuring both read and program operations achieve their goals without complete interruption of either.
3Reliability
If read operations are queued during pre-reads for program operations, then program integrity is maintained, but read starvation occurs due to collisions
Solution Approach 1:
The patent introduces suspend and resume commands as intermediary control mechanisms between read and program operations. These intermediaries allow the system to coordinate conflicting operations by pausing program execution at appropriate points, enabling read operations to access memory without compromising program integrity.
Solution Approach 2:
The patent implements periodic suspension and resumption of program operations, creating a rhythmic pattern of program execution interrupted by read operations. This periodic action allows the system to alternate between program and read phases, maintaining program integrity while periodically servicing read requests to prevent starvation.
Data Source
Figure 1
Figure 2A
Figure 2B
AI summary
A method and apparatus to reduce read latency and improve read quality of service (Read QoS) for non-volatile memory, such as NAND array in a NAND device. For read commands that collide with an in-progress program array operation targeting the same program locations in a NAND array, the in-progress program is suspended and the controller allows the read command to read from the internal NAND buffer instead of waiting for the in-progress program to complete. For read commands queued during an in-progress program that is processing pre-reads in preparation for a program array operation, pre-read bypass allows the reads to be serviced between the pre-reads and before the program's array operation starts. In this manner, read commands can be serviced without suspending the in-progress program. Allowing internal NAND buffer reads and enabling pre-read bypass reduces read latency and improves Read QoS.