3D NAND Memory Conductive Line Fan-Out via Dummy Array Segmentation
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Solution Overview
Problem
In 3D vertical gate NAND memory structures, the formation of conductive lines near boundaries is complicated due to unpredictable lithography and etching behavior, leading to a higher failure rate due to bridge formation between word lines and bit lines.
Innovation Solution
The fan-out portions of conductive lines are fabricated in a dummy array region on dummy stacks, allowing all conductive lines to be formed in a more regular environment, reducing the failure rate by defining predetermined regions with specific orientations and removing excess conductive material to create conductive lines with curved or stronger shapes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conductive lines are formed near the boundary region of bit lines, then the memory structure can accommodate fan-out portions of word lines, but the lithography and etching behavior becomes unpredictable leading to higher failure rate
Solution Approach 1:
The bit line boundary region is segmented into a regular region and a dummy array region. The dummy array region is created by extending bit lines beyond the actual memory cell array, providing a dedicated space for forming fan-out portions of word lines. This segmentation isolates the complex boundary formation from the regular memory array, allowing each region to be optimized independently for its specific function.
Solution Approach 2:
The dummy array region acts as an intermediary zone between the regular memory array and the periphery region. It provides a transition area where word lines can be formed with proper spacing and alignment before connecting to the bit lines, eliminating the need to form conductive lines directly at the unpredictable boundary region.
2Adaptability or versatility
If conductive lines are formed across bit line boundaries, then word line fan-out can be achieved, but bridge formation occurs due to unpredictable lithography and etching behavior
Solution Approach 1:
The dummy array region is prepared in advance by forming extended bit line structures before forming the word lines. This preliminary action creates well-defined boundaries and spacing guidelines that guide subsequent lithography and etching processes, ensuring that word lines are formed with adequate spacing from bit lines and preventing bridge formation.
Solution Approach 2:
Different regions are given different structural characteristics: the regular region contains tightly packed memory cells, while the dummy array region contains extended bit line structures with larger spacing. This local quality differentiation allows the dummy region to serve as a buffer zone where word lines can be formed with proper clearance from bit lines, eliminating the bridge formation problem at boundaries.
3Ease of manufacture
If fan-out portions are formed outside stacks in the periphery region, then conductive line routing is simplified, but the formation environment becomes more complicated leading to higher failure rate
Solution Approach 1:
The dummy array region serves multiple functions: it extends the bit line structures to provide routing paths for word line fan-out, maintains a regular formation environment consistent with the memory array, and provides adequate spacing to prevent bridge formation. This multi-functionality allows the same structural approach to be used throughout the device, simplifying the manufacturing process while improving reliability.
Data Source
AI summary
A memory structure and a method for manufacturing the same are provided. The memory structure comprises a substrate, stacks, memory layers, a conductive material and conductive lines. The stacks are positioned on the substrate. The stacks are separated from each other by trenches. Each of the stacks comprises alternately stacked conductive stripes and insulating stripes. The memory layers conformally cover the stacks respectively. The conductive material is positioned in the trenches and on the stacks. The conductive material in the trenches forms one or more holes in each of the trenches. The conductive lines are positioned on the conductive material. Each of the conductive lines comprises a first portion and a second portion connected to each other, the first portion extends along a direction perpendicular to an extending direction of the stacks, and the second portion extends along the extending direction of the stacks.