3D NAND Flash Memory Background Read Refresh
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Solution Overview
Problem
Three-dimensional (3D) NAND flash memory experiences charge buildup over time, leading to increased errors and inconsistent data reading, which is not effectively mitigated in existing hard disk drive or solid-state drive architectures.
Innovation Solution
A method involving a sequencer that cycles through background read operations of flash memory blocks, discharging the charge buildup and refreshing the 3D NAND flash memory, thereby reducing raw error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If 3D NAND flash memory is used to increase storage capacity, then storage capacity is improved, but charge buildup occurs over time leading to increased errors and inconsistent data reading
Solution Approach 1:
The system performs preliminary refresh operations on flash memory blocks by cycling background reads before actual data read operations. This preliminary action discharges charge buildup in advance, preventing errors during subsequent data reading operations and maintaining reliability in high-capacity 3D NAND flash memory.
2Reliability
If background read operations are performed to refresh flash memory, then data reading consistency is improved, but storage capacity is reduced due to available space being used for refresh operations
Solution Approach 1:
The refresh operation uses the flash memory blocks themselves to perform the refresh function by cycling background reads on the blocks. This self-service approach allows the storage medium to refresh itself without requiring separate dedicated refresh memory, thereby maintaining maximum storage capacity while improving data reading consistency.
3Adaptability or versatility
If conventional hard disk drive or solid-state drive architectures are used, then compatibility is maintained, but error behaviors in 3D NAND flash memory are not mitigated
Solution Approach 1:
The system dynamically adapts the refresh operation to the specific error behaviors and charge buildup characteristics of 3D NAND flash memory. By cycling background reads based on flash memory block states rather than static conventional architectures, the system maintains compatibility while actively mitigating errors through adaptive refresh operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively discharges charge buildup in 3D NAND flash memory, leading to lower raw error rates and improved data reading consistency compared to existing architectures.
Implementation Method 1
A method involving a sequencer that cycles through background read operations of flash memory blocks, discharging the charge buildup and refreshing the 3D NAND flash memory
Data Source
AI summary
A method for processing blocks of flash memory to decrease raw bit errors from the flash memory is provided. The method includes identifying one or more blocks of the flash memory for a refresh operation and writing information regarding the identified blocks, to a data structure. The method includes issuing background reads to the identified blocks, according to the data structure, as the refresh operation. The method may be embodied on a computer readable medium. In some embodiments the background reads may be based on a time based refresh responsive to an increase in raw bit error count in the flash memory over time.