NAND Flash Error Correction via Bit Error Indicators
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Solution Overview
Problem
NAND flash storage systems face data bit errors due to wear from program-erase cycles and read operations, leading to reduced write and read endurance, and increased probability of data corruption from read disturbance.
Innovation Solution
A data storage system that uses a bit error indicator to correct data bit errors, extending the error correction capacity of error correction codes and reducing the need for program-erase cycles by modifying data bits based on the indicator, thereby enhancing data integrity and storage block lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If program-erase cycles are performed to write data to memory pages, then data can be stored in the memory page, but wear to the storage block increases and write endurance decreases
Solution Approach 1:
The system performs preliminary error detection and correction actions by reading data, detecting errors, and correcting them before the next write operation. This preliminary maintenance reduces the accumulation of wear and extends the storage block's usable life, allowing more program-erase cycles before replacement is needed.
2Ease of operation
If read operations are performed on memory pages, then data can be accessed randomly from any memory page, but wear to the memory page increases and read endurance decreases
Solution Approach 1:
The memory system performs self-diagnosis and self-correction by continuously monitoring for read disturbances and automatically correcting errors detected during read operations. This self-maintenance service compensates for the wear caused by random access operations, extending the read endurance without limiting random access capability.
3Productivity
If read operations are performed on memory pages, then data can be read, but read disturbance occurs and data bit errors increase temporarily
Solution Approach 1:
The system implements feedback by detecting read disturbance errors during read operations and using the error correction code to automatically correct the corrupted data bits. This closed-loop feedback mechanism maintains data accuracy even when read operations cause temporary disturbances, ensuring continuous reliable data access.
4Reliability
If error correction codes are used to correct data bit errors, then data integrity is improved, but the error correction capacity is limited and cannot handle all types of errors
Solution Approach 1:
The error correction system is segmented into multiple functional stages: first-stage correction for single-bit read disturbance errors using bit error indicators, and second-stage correction for multiple-bit errors using error correction codes. This segmentation allows the system to handle a broader range of error types by dividing the correction task into specialized stages, effectively extending the overall error correction capacity.
Data Source
AI summary
A data storage device reads a data unit from a memory page, detects a number of data bit errors in the data unit, and generates a bit error indicator identifying bit indexes of the data bit errors in the data unit. The data storage device reads the data unit from the memory page once again and generates a corrected data unit by correcting data bit errors in the data unit based on the error correction code if the number of data bit errors in the data unit does not exceed an error correction capacity of the error correction code. Otherwise, the data storage device generates a modified data unit based on the data unit by negating at least one erroneous data bit the data unit based on the bit error indicator and corrects any remaining data bit errors in the modified data unit based on the error correction code.