NAND Flash Block Retiring via Dummy Access Lines

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Solution Overview

Problem

In NAND flash memory devices, the reduced dimensions of charge storage materials lead to electrical shorts and non-conductive issues, causing threshold voltage shifts and potential data errors due to electron trapping in select gates during program, erase, and read operations, affecting the reliability of the NAND flash array.

Innovation Solution

Implementing a method to check and maintain the threshold voltage of select gates and adjacent cells within prescribed ranges after an erase operation, using dummy access lines and cells to prevent electron accumulation and reduce electric fields, thereby ensuring the reliability of the NAND flash array by verifying the integrity of memory blocks and retiring blocks with unacceptable voltage shifts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the dimensions of charge storage materials are reduced to increase storage capacity, then the data storage capacity is improved, but electrical shorts and non-conductive issues occur causing threshold voltage shifts and data errors

Engineering Contradiction:
Improvedata storage capacityVSAvoidthreshold voltage stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent introduces dummy access lines as intermediary elements between the select gates and the memory cell arrays. These dummy access lines act as mediators to capture excess electrons that would otherwise be trapped in the select gates, thereby preventing threshold voltage shifts in the functional memory cells while enabling continued operation at reduced dimensions

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent converts the harmful effect of electron trapping in select gates (which causes threshold voltage shifts and reliability issues) into a beneficial outcome by using dummy access lines to intentionally trap these electrons. The electrons that would be harmful to functional cells are redirected to serve a protective function, stabilizing the threshold voltages of actual memory cells

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Reliability

If dummy access lines and cells are used to prevent electron accumulation in select gates, then the threshold voltage stability is improved, but the device complexity increases

Engineering Contradiction:
Improvethreshold voltage stabilityVSAvoidarray structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dummy access lines perform multiple functions: they serve as electron traps to protect select gates, act as structural placeholders that maintain array symmetry, and provide additional pathways for charge distribution. This multi-functionality justifies the added structural elements by demonstrating their broader protective and stabilizing roles beyond simple electron trapping

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of NAND flash arrays by preventing fatal data errors and maintaining the integrity of memory blocks by ensuring threshold voltages remain within acceptable ranges, thereby improving the overall performance and data storage capacity.

Implementation Method 1

The charge storage structure is located between the CG and semiconductor material and stores electrons or holes placed on it. When electrons are trapped on the FG, they modify the threshold voltage (Vt) of the cell.

Methodology Applied
Scientific EffectElectron trapping: Electrostatics

Implementation Method 2

Memory cells of the array are coupled together in series, source to drain, between a source line and the data line. Memory cells in a NAND array architecture can be programmed to a desired state. That is, electric charge can be accumulated (e.g., placed) on, or removed from, the floating gate of a memory cell

Methodology Applied
Scientific EffectCharge removal: Electrostatics

Data Source

PatentUS8767467B2In-field block retiring
Publication Date: 2014.07.01 MICRON TECHNOLOGY INC
  • US8767467B2 patent drawing
  • US8767467B2 patent drawing
  • US8767467B2 patent drawing

AI summary

Memory devices and methods are disclosed, including a method involving erasing a block of memory cells. After erasing the block, and before subsequent programming of the block, a number of bad strings in the block are determined based on charge accumulation on select gate transistors. The block is retired from use if the number of bad strings exceeds a threshold. Additional embodiments are disclosed.