NAND Flash Memory Boot Loader Segmentation for Error Reduction

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Solution Overview

Problem

NAND flash memories are prone to bit errors due to their structure, requiring complex error correction and having limited capacity for program storage, which degrades performance when used for executing programs.

Innovation Solution

An information processing apparatus utilizing a NAND flash memory with a first block for storing error-free data and a second block for storing programs, where the loader program writes the apparatus controlling program to volatile memory, allowing execution without degrading performance and minimizing data register updates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If NAND flash memory is used to store programs, then cost is reduced, but bit errors occur due to structural limitations

Engineering Contradiction:

ImprovecostVSAvoidbit error rate

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The NAND flash memory is divided into two distinct blocks: a first block for storing the loader program with high reliability requirements, and a second block for storing the apparatus controlling program with lower reliability requirements. This segmentation allows the system to use inexpensive NAND flash memory while protecting critical boot functions by storing them in a more reliable location.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A volatile memory is introduced as an intermediary between the NAND flash memory and the execution unit. The loader program copies the apparatus controlling program from the second block of NAND flash memory to the volatile memory, which then executes the program. This intermediary buffer isolates the execution process from direct access to the error-prone NAND flash memory.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Ease of manufacture

If NAND flash memory is used to store and execute programs, then cost is reduced, but performance degrades due to slow random access

Engineering Contradiction:

ImprovecostVSAvoidrandom access speed

Core Design Contradiction:

Ease of manufactureVSSpeed

Solution Approach 1:

The loader program pre-copies the apparatus controlling program from the NAND flash memory to the volatile memory before execution. This preliminary action moves the frequently accessed program code to a faster memory medium, eliminating the need for slow random access operations during program execution.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The volatile memory serves as an intermediary that provides fast random access capability. By placing the executing program in volatile memory rather than directly in NAND flash memory, the system achieves both cost savings (using NAND flash for storage) and performance (using volatile memory for execution).

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS7398425B2Information processing apparatus including NAND flash memory, and information processing method for the same

Publication Date: 2008.07.08 CANON KK

AI summary

An information processing apparatus includes a non-volatile memory including a first block where data error does not occur and a second block where data error is possible to occur. The first block stores a loader program, and the second block stores an apparatus controlling program. The loader program is executed to write the apparatus controlling program stored in the second block to a volatile memory, and the apparatus controlling program is executed on the volatile memory. Thus, the information processing apparatus can be provided at a reduced cost, using a NAND flash memory, which is inexpensive, to store a program.