NAND Flash Memory Channel Boosting for Hot Electron Disturb
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
NAND flash memory devices experience hot electron program disturb phenomena due to channel boosting, which increases as memory cell size decreases, leading to data programming errors and yield reduction.
Innovation Solution
The method involves boosting channels of memory cells connected to edge word lines to a lower voltage than those connected to other word lines, using voltage dividers to generate a channel boosting disturb-prevention voltage that reduces the electric field and prevents hot electron introduction into floating gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cell size is decreased to increase integration level, then device density is improved, but hot electron program disturb phenomenon increases
Solution Approach 1:
The patent applies different voltages to different groups of memory cells based on their location. Specifically, memory cells connected to non-selected bit lines receive a first voltage (e.g., 5V) while memory cells connected to selected bit lines receive a second voltage (e.g., 0V). This local differentiation prevents hot electron generation in non-selected cells while maintaining proper operation in selected cells, thereby resolving the disturb issue without sacrificing density.
Solution Approach 2:
The patent changes the voltage parameter applied to memory cells during programming operations. By dynamically adjusting the voltage level based on the selection state of bit lines and word lines, the patent controls the electric field strength to prevent hot electron generation. This parameter change approach allows the same memory cell structure to operate correctly at higher densities without suffering from hot electron disturb.
2Reliability
If channel voltage is boosted to prevent program disturb, then reliability is improved, but hot electron generation increases
Solution Approach 1:
The patent applies channel boosting selectively only to memory cells that need it (those connected to selected bit lines), while leaving other cells (connected to non-selected bit lines) at lower voltage. This localized approach provides the reliability benefit of channel boosting where needed while avoiding hot electron generation in cells where boosting is unnecessary.
Solution Approach 2:
The patent applies a preliminary counter-voltage to non-selected memory cells to prevent hot electron generation before it can occur. By applying a lower voltage (or ground) to cells connected to non-selected bit lines during programming operations, the patent proactively prevents the electric field conditions that would lead to hot electron generation, thereby maintaining reliability without the harmful side effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces hot electron program disturbance, improving yield and reducing the margin between Vpass disturb and Vpgm disturb, allowing for more reliable data storage in smaller memory cells.
Implementation Method 1
boosting channels of a first group of memory cells to a first voltage... boosting channels of a second group of memory cells to a second voltage
Data Source
AI summary
A method for preventing generation of program disturbance incurred by hot electrons in a NAND flash memory device. A channel boosting disturb-prevention voltage lower than a program-prohibit voltage applied to other word lines is applied to edge word lines coupled to memory cells that are nearest to select transistors. As a result, an electric field between the memory cells coupled to the edge word lines and the select transistors is weakened, and the energy of the hot electrons is reduced.