NAND Flash Memory Channel Potential Equalization
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Solution Overview
Problem
Flash memory devices face errors due to the hot carrier effect during programming, which arises from variations in channel potentials between memory cell transistors, leading to erroneous programming and increased soft-programming errors.
Innovation Solution
The method involves applying specific bias voltages to string selection lines and bit lines to equalize adjacent channel potentials, using voltages such as Vcc±α, Vpass, and incremental step pulse programming to reduce the potential difference between channels, thereby minimizing hot carrier effects and preventing soft-programming errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If programming voltage is applied to selected word line during programming, then programming operation is enabled, but channel potential difference increases causing hot carrier effect and programming errors
Solution Approach 1:
The patent applies different voltage levels to different word lines during programming operations. Specifically, it uses a first voltage level for selected word lines to enable programming, while applying a second voltage level (different from the first) to unselected word lines to control channel potential and prevent hot carrier effect. This parameter differentiation resolves the contradiction by allowing productive programming while maintaining reliability through voltage optimization.
Solution Approach 2:
The patent implements local voltage control where different regions of the memory array receive different voltage levels based on their selection state. Selected word lines receive programming voltage locally, while unselected word lines receive different voltage levels to prevent interference. This local quality approach enables the system to achieve both high productivity in selected regions and high reliability in unselected regions simultaneously.
2Reliability
If adjacent channel potentials are equalized, then hot carrier effect is reduced, but additional voltage control complexity is introduced
Solution Approach 1:
The patent makes the existing word line voltage control mechanism serve multiple functions: it not only selects which memory cells to program but also simultaneously controls channel potential to prevent hot carrier effect. By making the voltage control system universal, the patent achieves improved reliability without adding separate complexity, as the same control lines perform dual purposes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the voltage difference between adjacent channel potentials, preventing hot carrier-induced errors and ensuring accurate programming by maintaining channel potentials within a critical threshold, thus enhancing the reliability of flash memory devices.
Implementation Method 1
Flash memory devices face errors due to the hot carrier effect during programming, which arises from variations in channel potentials between memory cell transistors
Data Source
AI summary
An flash memory device includes a block of NAND cell units, each NAND cell unit in the block includes n memory cell transistors MC controlled by a plurality of n wordlines, and is connected in series between a string selection transistor SST connected to a bitline and a ground selection transistor GST. While a programming voltage Vpgm is applied to a selected wordline WL, a cutoff voltage Vss is applied to a nearby unselected wordline closer to the ground selection transistor GST to isolate a first local channel Ch1 from a second local channel Ch2. As the location i of the selected wordline WL increases close to the SST, the second channel potential Vch2 tends to increase excessively, causing errors. The excessive increase of Vch2 is prevented by modifying the voltages applied to string select lines (SSL) and/or to the bit lines (BL), or the pass voltages Vpass applied to the unselected wordlines (WL<i+1 through WL<n->), only if the selected wordline WL location i is equal or greater than a predetermined (stored) location number x. If incremental step pulse programming (ISPP) is implemented, the applied voltages are modified only if the ISPP loop count j is equal or greater than a predetermined (stored) critical loop number y.