NAND Flash Charge Loss Compensation via Dynamic Read Voltage
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Solution Overview
Problem
Flash memory devices face challenges with charge loss and read disturb effects, which can lead to errors due to changes in charge levels within memory cells, especially during read operations and over time.
Innovation Solution
Implementing a charge loss estimation process to adjust read parameters, such as Vpass voltage and read voltage levels, to compensate for charge loss and reduce read-disturb errors by accurately aligning read voltage levels with decreased charge levels in memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read operations are performed with standard Vpass voltage levels, then read speed is maintained, but charge loss and read-disturb errors increase
Solution Approach 1:
The patent implements dynamic adjustment of Vpass voltage levels based on the age of stored data. The system transitions from static voltage levels to dynamic levels that adapt to charge loss over time, allowing higher voltages for older data and standard voltages for newer data, thus resolving the contradiction between reliability and productivity
Solution Approach 2:
The system changes the Vpass voltage parameter based on data age and charge loss estimation. By modifying this critical parameter dynamically, the system achieves both high read accuracy for degraded cells and maintains standard performance for healthy cells, resolving the trade-off between reliability and speed
2Reliability
If Vpass voltage is increased to compensate for charge loss, then read accuracy improves, but read-disturb errors increase
Solution Approach 1:
The patent applies different Vpass voltage levels to different data regions based on their specific charge loss characteristics. Instead of uniformly increasing voltage across all cells, the system selectively applies higher voltages only where needed, reducing read-disturb effects while maintaining read accuracy
Solution Approach 2:
The system uses charge loss estimation as feedback to determine appropriate Vpass voltage levels. This feedback mechanism prevents excessive voltage application that would cause read-disturb, by continuously monitoring charge levels and adjusting voltages accordingly
3Reliability
If charge loss compensation is applied to all read operations, then read errors are minimized, but device complexity increases
Solution Approach 1:
The patent implements charge loss compensation selectively rather than universally. The system applies compensation only when charge loss is detected or suspected, based on data age and other factors, avoiding the complexity of universal compensation while maintaining data integrity where needed
Data Source
AI summary
Disclosed in some examples are methods, systems, devices, and machine-readable mediums for compensating for charge loss effects. In some examples, a charge loss may be estimated by a charge loss monitor for a particular unit of a NAND device and may be utilized to select a charge loss compensation scheme. The charge loss may be estimated by the charge loss estimation process by determining a reference read voltage and calculating a bit count resulting from a read at that reference read voltage. The number of bits returned may be used to select the particular charge loss compensation scheme.