NAND Flash Memory Control Circuit for Selective Data Output
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Solution Overview
Problem
Current memory systems with NAND flash memory face challenges in efficiently processing and communicating data due to errors and mismatched conditions, leading to increased data transmission and power consumption.
Innovation Solution
The implementation of a memory system with a control circuit that selectively outputs data from NAND flash memory based on error detection and condition satisfaction, utilizing both strong ECC and high throughput ECC circuits, along with internal and external comparison circuits to manage data extraction and correction within the memory controller and NAND flash memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is read from NAND flash memory and output to memory controller, then data access is enabled, but data communication overhead and power consumption increase
Solution Approach 1:
The memory system performs error detection and condition evaluation on read data before outputting it to the memory controller. By preliminarily processing the data within the NAND flash memory device, the system determines whether data should be output based on error status and conditions, thereby avoiding unnecessary data communication and reducing power consumption while maintaining fast data access when needed
2Reliability
If all read data is output to memory controller for processing, then data access completeness is ensured, but data communication volume increases
Solution Approach 1:
The system preliminarily evaluates data conditions and error status within the NAND flash memory device before outputting data to the memory controller. This preliminary action enables the system to selectively output only necessary data, ensuring data access completeness for required information while significantly reducing unnecessary data communication volume
Solution Approach 2:
The memory system extracts and outputs only the necessary data portions that meet specific conditions and error criteria, rather than outputting all read data. This extraction approach maintains data access completeness for required information while reducing overall data communication volume between the NAND flash memory and memory controller
Data Source
AI summary
According to one embodiment, a nonvolatile memory includes memory cells coupled to a word line and a control circuit. The control circuit is configured to read, from the memory cells, data including at least one partial data; determine whether or not the partial data includes an error; output, if it is determined that the partial data includes an error, the data to a memory controller; further determine, if it is determined that the partial data does not include an error, whether or not the partial data satisfies a condition; output, if it is determined that the partial data satisfies the condition, the partial data to the memory controller; and not output, if it is determined that the partial data does not satisfy the condition, the partial data to the memory controller.