NAND Flash Controller Erase Command Translation

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Solution Overview

Problem

Existing multi-function printers (MFPs) using SSDs face challenges in efficiently erasing data from NAND type flash memory, as direct overwrite operations are time-consuming and limited by rewrite cycles, requiring special commands and specifications, making it difficult to substitute SSDs for HDDs without host apparatus modifications.

Innovation Solution

An information processing apparatus with NAND type flash memory, circuitry for data control, and an interface to determine overwrite commands from the host, allowing erasure by removing electric charges in specific physical blocks, enabling efficient data erasure without special commands or host modifications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If direct overwrite operation is used to erase data in NAND type flash memory, then data erasure can be performed, but the operation is time-consuming and limited by rewrite cycles

Engineering Contradiction:
Improvedata erasure reliabilityVSAvoiddata erasure time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Instead of overwriting data directly (the conventional approach), the patent inverts the approach by detecting overwrite commands and translating them into erase commands. The controller recognizes when data is being overwritten and directly erases the physical block, bypassing the time-consuming write-then-erase process and preserving rewrite cycles.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The controller acts as an intermediary between the host apparatus and the NAND type flash memory. It intercepts overwrite commands from the host, detects their intent, and translates them into appropriate erase commands for the flash memory, thereby resolving the contradiction between data erasure reliability and time consumption.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If special erasing commands are prepared for SSD, then data erasure operation can be carried out, but it requires special specification change for host apparatus

Engineering Contradiction:
Improvedata erasure operationVSAvoidhost apparatus compatibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The controller is designed to handle multiple command types universally. It can process both normal write commands and overwrite commands through a unified command processing mechanism, allowing the SSD to work with standard host interfaces without requiring special erasing commands or host apparatus modifications.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The controller serves as an intermediary that translates between the host's universal command interface and the flash memory's specific operational requirements. By detecting overwrite intent within standard commands and converting them to erase operations, it maintains host apparatus compatibility while enabling reliable data erasure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution allows reliable data erasure in SSDs, reduces the need for special commands, and extends the life of NAND type flash memory by avoiding repetitive write operations, enabling seamless substitution for HDDs without altering host apparatus specifications.

Implementation Method 1

erase a physical block including the specific area when it is determined to erase the data by removing electric charges in the NAND type flash memory in the physical block including the specific area

Methodology Applied
Scientific EffectElectric charge removal:

Data Source

PatentUS9223695B2Information processing apparatus
Publication Date: 2015.12.29 BUFFALO CORP LTD
  • US9223695B2 patent drawing
  • US9223695B2 patent drawing
  • US9223695B2 patent drawing

AI summary

An information processing apparatus including a NAND type flash memory; circuitry configured to control writing/reading of data to/from the NAND type flash memory; and an interface configured to connect the information processing apparatus to a host apparatus. The circuitry is configured to determine whether to erase data stored in a specific area within the NAND type flash memory by overwriting the data based on whether an overwrite command is received from the host apparatus via the interface; and erase a physical block including the specific area when it is determined to erase the data by removing electric charges in the NAND type flash memory in the physical block including the specific area.