NAND Flash Controller Erase Voltage Adjustment
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Solution Overview
Problem
NAND flash memory systems face degradation of tunnel oxide films due to repeated program and erase voltage applications, leading to errors in data programming, reading, or erasing, and result in an increase in defective blocks, which reduces the memory's lifespan.
Innovation Solution
A memory system that includes a nonvolatile memory and a controller, which repeatedly applies erase voltage and performs verification processes, adjusts the erase verification voltage based on iteration count and verification results, and sets blocks to a prohibited state if the erase time exceeds a threshold, thereby extending the memory's lifespan by preventing excessive defective block creation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If erase voltage is repeatedly applied to nonvolatile memory, then data can be erased and reused, but the tunnel oxide film degrades and defective blocks increase
Solution Approach 1:
The patent applies preliminary action by performing erase verification after each erase voltage application to detect degraded blocks before they cause data errors. The controller proactively identifies blocks with long erase times or verification failures and sets them to prohibited state in advance, preventing future read/write operations on unreliable blocks.
Solution Approach 2:
The patent implements feedback mechanisms by monitoring erase time and verification results, then adjusting subsequent erase operations accordingly. When verification fails or erase time exceeds thresholds, the system modifies its behavior by prohibiting access to affected blocks. The controller also adjusts erase verification voltage based on iteration count and verification outcomes to optimize the balance between erasing capability and block protection.
2Measurement precision
If erase verification voltage is increased to ensure complete erasure, then verification accuracy improves, but the time required for each verification cycle increases
Solution Approach 1:
The patent applies dynamics by making the erase verification voltage adjustable rather than fixed. The controller dynamically changes the verification voltage based on the iteration count and verification results. For example, it may use lower verification voltages in early iterations and increase them if verification fails, or adjust based on how many times the erase operation has been repeated on the same block.
Solution Approach 2:
The patent implements parameter changes by modifying the erase verification voltage level according to the erase iteration count and verification outcomes. The system changes this critical parameter to optimize the balance between verification accuracy and time consumption, adapting the verification stringency based on the block's erase history and current state.
3Quantity of substance
If blocks with long erase times are continued to be used, then storage capacity is maintained, but data errors increase due to tunnel oxide degradation
Solution Approach 1:
The patent applies this principle by treating blocks that exceed erase time thresholds as disposable - once a block shows signs of degradation through prolonged erase times, it is prohibited from further use. Rather than attempting to extend the life of degraded blocks, the system writes them off and makes them unavailable for new operations, similar to replacing short-lived components once they reach their service limit.
Solution Approach 2:
The patent implements preliminary anti-action by proactively prohibiting access to blocks before they can cause data errors. By monitoring erase times and setting blocks to prohibited state when thresholds are exceeded, the system prevents potential data corruption rather than reacting to errors after they occur. This preemptive measure protects data integrity by isolating degraded blocks before they can harm stored information.
Data Source
AI summary
According to one embodiment, a memory system includes a memory and controller. The controller repeatedly performs an erase voltage application process for data stored in a target area in the memory. The controller performs an erase verification process for determining whether the erase is successful using erase verification voltage. The controller determines whether an erase time is longer than a first threshold value. The controller sets the target area to a use prohibition state when the erase time is longer than the first threshold value.