NAND Flash Memory Controller Verify Operation for Threshold Distribution

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Solution Overview

Problem

In NAND flash memory devices, the write operation affects adjacent memory cells through capacitive coupling, leading to shifts in threshold voltage distributions, resulting in erroneous read frequencies and degraded reliability due to the shrinking size of memory cells.

Innovation Solution

A nonvolatile semiconductor memory device with a controller that uses multiple verification voltages to determine the completion of a write operation based on the threshold voltage of a memory cell and the data pattern of adjacent cells, thereby preventing the widening of threshold distributions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are shrunk to increase storage capacity, then storage density is improved, but threshold voltage distribution widens due to capacitive coupling effects from adjacent cells

Engineering Contradiction:
Improvestorage capacityVSAvoidthreshold voltage distribution
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing a verify operation before the write operation is completed. The controller determines whether to complete the write based on the verify result and adjacent cell data patterns. This preliminary verification prevents threshold voltage distribution widening by identifying cells that would be adversely affected by capacitive coupling from adjacent cell writes.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using the verify operation results to control the completion of the write operation. The controller continuously monitors threshold voltage shifts during the write process and adjusts the write completion decision based on real-time verify results and adjacent cell data patterns, thereby maintaining threshold voltage distribution precision.

Inventive Principle:
Principle #23Feedback

2Productivity

If write operation is performed on all memory cells connected to one word line, then write speed is improved, but erroneous reads increase due to capacitive coupling effects on adjacent cells

Engineering Contradiction:
Improvewrite speedVSAvoidread accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The controller performs a verify operation as a preliminary step before finalizing the write operation. This preliminary verification identifies memory cells whose threshold voltages would be adversely affected by capacitive coupling from adjacent cell writes, allowing the controller to prevent erroneous reads while maintaining efficient bulk write operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses feedback from the verify operation results to control write completion. The controller monitors threshold voltage shifts in real-time during the write process and adjusts write completion decisions based on verify results and adjacent cell data patterns, thereby maintaining read accuracy without sacrificing write speed.

Inventive Principle:
Principle #23Feedback

3Measurement precision

If threshold voltage distribution is narrowed to improve read accuracy, then read precision is improved, but write operation complexity increases due to need for verify operations and adjacent cell data pattern analysis

Engineering Contradiction:
Improveread accuracyVSAvoidwrite operation control
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The verify operation is performed as a preliminary step before write completion, systematically evaluating threshold voltage shifts and adjacent cell data patterns. This structured preliminary assessment narrows the threshold voltage distribution effectively while managing write operation complexity through a clear decision-making framework.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller uses feedback from verify operations to make informed decisions about write completion. This feedback mechanism systematically narrows threshold voltage distribution by identifying and preventing adverse capacitive coupling effects, while managing complexity through automated control based on verify results and data pattern analysis.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces erroneous reads by maintaining a narrower threshold distribution, ensuring accurate data retrieval and improving the reliability of NAND flash memory devices even as memory cells shrink.

Implementation Method 1

the write operation is performed as a unit of all the memory cells connected to one word line. When the electrons are injected in the charge storage layer of the memory cell, sometimes a threshold voltage of an adjacent memory cell in which the data is already written is shifted by the influence of capacitive coupling.

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS8854878B2Nonvolatile semiconductor memory device
Publication Date: 2014.10.07 KIOXIA CORP
  • US8854878B2 patent drawing
  • US8854878B2 patent drawing
  • US8854878B2 patent drawing

AI summary

According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a controller. The controller is configured to perform a verify operation using a first verification voltage and a second verification voltage (first verification voltage<second verification voltage) when first value data is stored in a first memory cell. The controller is configured to determine whether a write operation to the first memory cell is completed or continued based on write data of a second memory cell adjacent to the first memory cell when a threshold voltage of the first memory cell is greater than or equal to the first verification voltage and less than the second verification voltage.